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W634GU6NB Dataheets PDF



Part Number W634GU6NB
Manufacturers Winbond
Logo Winbond
Description 32M x 8-BANKS x 16-BIT DDR3L SDRAM
Datasheet W634GU6NB DatasheetW634GU6NB Datasheet (PDF)

W634GU6NB 32M  8 BANKS  16 BIT DDR3L SDRAM Table of Contents- 1. GENERAL DESCRIPTION 5 2. FEATURES ....5 3. ORDER INFORMATION ...

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W634GU6NB 32M  8 BANKS  16 BIT DDR3L SDRAM Table of Contents- 1. GENERAL DESCRIPTION ...................................................................................................................5 2. FEATURES ...........................................................................................................................................5 3. ORDER INFORMATION .......................................................................................................................6 4. KEY PARAMETERS .............................................................................................................................7 5. BALL CONFIGURATION ......................................................................................................................9 6. BALL DESCRIPTION..........................................................................................................................10 7. BLOCK DIAGRAM ..............................................................................................................................12 8. FUNCTIONAL DESCRIPTION............................................................................................................13 8.1 Basic Functionality ..............................................................................................................................13 8.2 RESET and Initialization Procedure ....................................................................................................13 8.2.1 Power-up Initialization Sequence .....................................................................................13 8.2.2 Reset Initialization with Stable Power ..............................................................................15 8.3 Programming the Mode Registers.......................................................................................................16 8.3.1 Mode Register MR0 .........................................................................................................18 8.3.1.1 Burst Length, Type and Order ................................................................................19 8.3.1.2 CAS Latency...........................................................................................................19 8.3.1.3 Test Mode...............................................................................................................20 8.3.1.4 DLL Reset...............................................................................................................20 8.3.1.5 Write Recovery .......................................................................................................20 8.3.1.6 Precharge PD DLL .................................................................................................20 8.3.2 Mode Register MR1 .........................................................................................................21 8.3.2.1 DLL Enable/Disable................................................................................................21 8.3.2.2 Output Driver Impedance Control ...........................................................................22 8.3.2.3 ODT RTT Values ....................................................................................................22 8.3.2.4 Additive Latency (AL) .............................................................................................22 8.3.2.5 Write leveling ..........................................................................................................22 8.3.2.6 Output Disable........................................................................................................22 8.3.3 Mode Register MR2 .........................................................................................................23 8.3.3.1 Partial Array Self Refresh (PASR) ..........................................................................24 8.3.3.2 CAS Write Latency (CWL) ......................................................................................24 8.3.3.3 Auto Self Refresh (ASR) and Self Refresh Temperature (SRT) .............................24 8.3.3.4 Dynamic ODT (Rtt_WR) .........................................................................................24 8.3.4 Mode Register MR3 .........................................................................................................25 8.3.4.1 Multi Purpose Register (MPR) ................................................................................25 8.4 No OPeration (NOP) Command..........................................................................................................26 8.5 Deselect Command.............................................................................................................................26 8.6 DLL-off Mode ......................................................................................................


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