MC74HC160A Presettable Counters Datasheet

MC74HC160A Datasheet, PDF, Equivalent


Part Number

MC74HC160A

Description

Presettable Counters

Manufacture

ON Semiconductor

Total Page 12 Pages
Datasheet
Download MC74HC160A Datasheet


MC74HC160A
MC74HC160A
Presettable Counters
HighPerformance SiliconGate CMOS
The MC74HC160A is identical in pinout to the LS160. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
The HC160A is a programmable BCD counters with asynchronous
Reset input.
Features
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2 to 6 V
Low Input Current: 1 mA
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 234 FETs or 58.5 Equivalent Gates
These are PbFree Devices
PRESENT
DATA
INPUTS
P0 3
P1 4
P2 5
P3 6
CLOCK 2
14 Q0
13 Q1
12 Q2
11 Q3
BCD
OUTPUTS
15
RIPPLE
CARRY
OUT
RESET
LOAD
COUNT
ENABLES
ENABLE P
ENABLE T
Figure 1. Logic Diagram
PIN 16 = VCC
PIN 8 = GND
Device
HC160
Count Mode
BCD
Reset Mode
Asynchronous
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16
1
MARKING
16 DIAGRAMS
SOIC16
D SUFFIX
CASE 751B
HC160AG
AWLYWW
1
16
TSSOP16
HC
16
1
DT SUFFIX
CASE 948F
160A
ALYWG
G
1
A
WL, L
YY, Y
WW, W
G or G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= PbFree Package
(Note: Microdot may be in either location)
PIN ASSIGNMENT
RESET
CLOCK
P0
P1
P2
P3
ENABLE P
GND
1
2
3
4
5
6
7
8
16 VCC
15 RIPPLE
CARRY OUT
14 Q0
13 Q1
12 Q2
11 Q3
10 ENABLE T
9 LOAD
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
© Semiconductor Components Industries, LLC, 2013
May, 2013 Rev. 2
1
Publication Order Number:
MC74HC160A/D

MC74HC160A
MC74HC160A
FUNCTION TABLE
Clock
Reset*
L
H
H
H
H
*HC160 is an Asynchronous Reset Device.
H = High Level
L = Low Level
X = Don’t Care
Inputs
Load
X
L
H
H
H
Enable P
X
X
H
L
X
Enable T
X
X
H
X
L
Outputs
Q
Reset
Load Preset Data
Count
No Count
No Count
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VCC DC Supply Voltage (Referenced to GND)
0.5 to +7.0
V
Vin DC Input Voltage (Referenced to GND)
0.5 to VCC + 0.5 V
Vout DC Output Voltage (Referenced to GND)
0.5 to VCC + 0.5 V
Iin DC Input Current, per Pin
±20 mA
Iout DC Output Current, per Pin
±25 mA
ICC DC Supply Current, VCC and GND Pins
±50 mA
PD Power Dissipation in Still Air, Plastic or Ceramic DIP†
SOIC Package†
750
500
mW
Tstg Storage Temperature
65 to +150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress
ratings only. Functional operation above the Recommended Operating Conditions is not implied.
Extended exposure to stresses above the Recommended Operating Conditions may affect device
reliability.
†Derating SOIC Package: 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
Vin, Vout
TA
tr, tf
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
Input Rise and Fall Time
(Figure 3)
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
Min
2.0
0
55
0
0
0
Max
6.0
VCC
+125
1000
500
400
Unit
V
V
°C
ns
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this highimpedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND v (Vin or Vout) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
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2


Features MC74HC160A Presettable Counters High− Performance Silicon−Gate CMOS The MC7 4HC160A is identical in pinout to the L S160. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS TTL outputs. The HC160A is a programmab le BCD counters with asynchronous Reset input. Features • Output Drive Capab ility: 10 LSTTL Loads • Outputs Direc tly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2 to 6 V • Low Input Current: 1 mA • High Noise Immunity Characteristic of CMOS Device s • In Compliance with the Requiremen ts Defined by JEDEC Standard No. 7A • Chip Complexity: 234 FETs or 58.5 Equi valent Gates • These are Pb−Free De vices PRESENT DATA INPUTS P0 3 P1 4 P 2 5 P3 6 CLOCK 2 14 Q0 13 Q1 12 Q2 11 Q3 BCD OUTPUTS 15 RIPPLE CARRY OUT RESET LOAD COUNT ENABLES ENABLE P ENABLE T Figure 1. Logic Diagram PIN 16 = VCC PIN 8 = GND Device HC160 Cou nt Mode BCD Reset Mode Asynchronous http://onsemi.com 16 1 MARKING 16 DIAGRAMS S.
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