DS110DF111 2-Channel Retimer Datasheet

DS110DF111 Datasheet, PDF, Equivalent


Part Number

DS110DF111

Description

2-Channel Retimer

Manufacture

etcTI

Total Page 30 Pages
Datasheet
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DS110DF111
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DS110DF111
SNLS461A – MAY 2013 – REVISED JUNE 2015
DS110DF111 Low-Power, Multirate, 2-Channel Retimer
1 Features
1 Pin-Compatible Retimer Family
– DS110DF111 With DFE: 8.5 to 11.3 Gbps
– DS125DF111 With DFE: 9.8 to 12.5 Gbps
• Adaptive CTLE Up to 34 dB Boost at 5.65 GHz
• Self-Tuning 5-Tap DFE
• Raw Equalized and Retimed Data Loopback
• Adjustable Transmit VOD: 600 to 1300 mVp-p
• Settable TX De-Emphasis Driver 0 to –12 dB
• Low Power Consumption: 200 mW/Channel
• Locks to Half, Quarter, and Eighth Data Rates for
Legacy Support
• On-Chip Eye Monitor (EOM), PRBS Generator
• Input Signal Detection, CDR Lock
Detection/Indicator
• Single 3.3-V or 2.5-V ±5% Power Supply
• SMBus, EEPROM, or Pin-Based Configuration
• 4.0-mm × 4.0-mm, 24-Pin QFN Package
• Operating Temp Range: –40°C to 85°C
2 Applications
• Front Port Optical Interconnects
• SFF-8431
• 10G/1G Ethernet
• CPRI
3 Description
The DS110DF111 is a dual-channel (1-lane
bidirectional) retimer with integrated signal
conditioning. The DS110DF111 includes an input
Continuous-Time Linear Equalizer (CTLE), clock and
data recovery (CDR), and transmit driver on each
channel.
The DS110DF111 with its on-chip Decision Feedback
Equalizer (DFE) can enhance the reach and
robustness of long, lossy, cross-talk-impaired high
speed serial links to achieve BER < 1x10-15. For less-
demanding applications and interconnects, the DFE
can be switched off and achieve the same BER
performance. The DS125DF111 and DS110DF111
devices are pin-compatible.
Each channel of the DS110DF111 independently
locks to serial data at data rates from 8.5 to 11.3
Gbps or to any supported subrate of these data rates.
This simplifies system design and lowers overall cost.
Programmable transmit de-emphasis driver offers
precise settings to meet the SFF-8431 output eye
template. The fully adaptive receive equalization
(CTLE and DFE) enables longer distance
transmission in lossy copper interconnect and
backplanes with multiple connectors. The CDR
function is ideal for use in front port parallel optical
module applications to reset the jitter budget and
retime high-speed serial data.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
DS110DF111
WQFN (24)
4.0 mm × 4.0 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
100nF
100nF
25 MHz
3.3V
1F
0.22F
(2x)
Simplified Schematic
OUTA_P
OUTA_N
DS110DF111
INA_P
INA_N
INB_P
INB_N
REFCLK_IN
VIN
GND
VDD
GND
DAP
OUTB_P
OUTB_N
SDA
SCL
LPF_REF_B
LPF_CP_B
LPF_REF_A
LPF_CP_A
EN_SMB
TX_DIS
VODA/READ_EN
ADDR0/LOCK
ADDR1/VODB/DONE#
100nF
100nF
1k:
22nF
22nF
1k: 1k:
3.3V
2k: 2k:
3.3V
1k:
1k:
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

DS110DF111
DS110DF111
SNLS461A – MAY 2013 – REVISED JUNE 2015
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 5
6.1 Absolute Maximum Ratings ..................................... 5
6.2 ESD Ratings.............................................................. 5
6.3 Recommended Operating Conditions....................... 5
6.4 Thermal Information .................................................. 5
6.5 Electrical Characteristics........................................... 6
6.6 Typical Characteristics .............................................. 9
7 Detailed Description ............................................ 10
7.1 Overview ................................................................. 10
7.2 Functional Block Diagram ....................................... 10
7.3 Feature Description................................................. 10
7.4 Device Functional Modes........................................ 15
7.5 Programming........................................................... 16
7.6 Register Maps ......................................................... 34
8 Applications and Implementation ...................... 43
8.1 Application Information............................................ 43
8.2 Typical Application ................................................. 43
9 Power Supply Recommendations...................... 45
10 Layout................................................................... 46
10.1 Layout Guidelines ................................................. 46
10.2 Layout Example .................................................... 46
11 Device and Documentation Support ................. 47
11.1 Documentation Support ........................................ 47
11.2 Community Resources.......................................... 47
11.3 Trademarks ........................................................... 47
11.4 Electrostatic Discharge Caution ............................ 47
11.5 Glossary ................................................................ 47
12 Mechanical, Packaging, and Orderable
Information ........................................................... 47
4 Revision History
Changes from Original (May 2013) to Revision A
Page
• Added Pin Configuration and Functions section, Handling Rating table, Feature Description section, Device
Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout
section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information
section ................................................................................................................................................................................... 1
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Product Folder Links: DS110DF111


Features Product Folder Sample & Buy Technical Documents Tools & Software Support & Community DS110DF111 SNLS461A – MAY 2013 – REVISED JUNE 2015 DS110DF111 L ow-Power, Multirate, 2-Channel Retimer 1 Features •1 Pin-Compatible Retimer Family – DS110DF111 With DFE: 8.5 to 11.3 Gbps – DS125DF111 With DFE: 9.8 to 12.5 Gbps • Adaptive CTLE Up to 3 4 dB Boost at 5.65 GHz • Self-Tuning 5-Tap DFE • Raw Equalized and Retimed Data Loopback • Adjustable Transmit VOD: 600 to 1300 mVp-p • Settable TX De-Emphasis Driver 0 to –12 dB • Lo w Power Consumption: 200 mW/Channel • Locks to Half, Quarter, and Eighth Dat a Rates for Legacy Support • On-Chip Eye Monitor (EOM), PRBS Generator • I nput Signal Detection, CDR Lock Detecti on/Indicator • Single 3.3-V or 2.5-V ±5% Power Supply • SMBus, EEPROM, or Pin-Based Configuration • 4.0-mm × 4.0-mm, 24-Pin QFN Package • Operatin g Temp Range: –40°C to 85°C 2 Appli cations • Front Port Optical Interconnects • SFF-8431 • 10G/1G Ethernet • CPRI 3 Description The DS110DF11.
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