DS90CF388

DS90C387, DS90CF388 www.ti.com SNLS012H – MAY 2000 – REVISED APRIL 2013 DS90C387, DS90CF388 Dual Pixel LVDS Display Interface (LDI)-SVGA/QXGA Check for Samples: DS90C387, DS90CF388 FEATURES 1 2 Complies with OpenLDI Specification for Digital Display Interfaces 32.5 to 112/170MHz Clock Support for DS90C387, 40 to 112MHz Clock Support for DS90CF388 Supports SVGA through QXGA Panel Resolutions Drives Long, Low Cost Cables Up to 5.38Gbps Bandwidth Pre-Emphasis Reduces Cable Loading Effects DC Balance Data Transmission Provided by Transmitter Reduces ISI Distortion Cable Deskew of +/−1 LVDS Data Bit Time (up to 80 MHz Clock Rate) of Pair-to-Pair Skew at Receiver Inputs; Intra-Pair Skew Tolerance of 300ps Dual Pixel Architecture Supports Interface to GUI and Timing Controller; Optional Single Pixel Transmitter Inputs Support Single Pixel GUI Interface Transmitter Rejects Cycle-to-Cycle Jitter 5V Tolerant on Data and Control Input Pins Programmable Transmitter Data and Control Strobe Select (Rising or Falling Edge Strobe) Backward Compatible Configuration Select with FPD-Link Optional Second LVDS Clock for Backward Compatibility w/ FPD-Link Support for Two Additional User-Defined Control Signals in DC Balanced Mode Compatible with ANSI/TIA/EIA-644-1995 LVDS Standard DESCRIPTION The DS90C387/DS90CF388 transmitter/receiver pair is designed to support dual pixel data transmission between Host and Flat Panel Display up to QXGA resolutions. The transmi...