DS90CR218A Strobe LVDS Datasheet

DS90CR218A Datasheet, PDF, Equivalent


Part Number

DS90CR218A

Description

+3.3V Rising Edge Data Strobe LVDS

Manufacture

etcTI

Total Page 17 Pages
Datasheet
Download DS90CR218A Datasheet


DS90CR218A
DS90CR218A
www.ti.com
SNLS054D – NOVEMBER 1999 – REVISED APRIL 2013
DS90CR218A +3.3V Rising Edge Data Strobe LVDS
21-Bit Channel Link - 12 MHz to 85 MHz
Check for Samples: DS90CR218A
FEATURES
1
• 12 to 85 MHz Shift Clock Support
• 50% Duty Cycle on Receiver Output Clock
• Low Power Consumption
• ±1V Common-mode Range (Around +1.2V)
• Narrow Bus Reduces Cable Size and Cost
• Up to 1.785 Gbps Throughput
• Up to 223 Mbytes/sec Bandwidth
• 345 mV (typ) Swing LVDS Devices for Low EMI
• PLL Requires No External Components
• Rising Edge Data Strobe
• Compatible with TIA/EIA-644 LVDS Standard
• Low Profile 48-Lead TSSOP Package
DESCRIPTION
The DS90CR218A receiver deserializes three input
LVDS data streams into 21 bits of CMOS/TTL output
data. When operating at the maximum input clock
rate of 85 Mhz, the LVDS data is received at 595
Mbps per data channel for a total data throughput of
1.785 Gbit/sec (233 Mbytes/sec).
The narrow bus and LVDS signalling of the
DS90CR218A is an ideal means to solve EMI and
cable size problems associated with wide, high-speed
TTL interfaces.
Block Diagram
Figure 1. DS90CR218A Top View
See Package Number DGG-48 (TSSOP)
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1999–2013, Texas Instruments Incorporated

DS90CR218A
DS90CR218A
SNLS054D – NOVEMBER 1999 – REVISED APRIL 2013
Connection Diagrams
www.ti.com
Typical Application
Figure 2. DS90CR218A
Figure 3. Typical Application
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
2 Submit Documentation Feedback
Copyright © 1999–2013, Texas Instruments Incorporated
Product Folder Links: DS90CR218A


Features DS90CR218A www.ti.com SNLS054D – NOV EMBER 1999 – REVISED APRIL 2013 DS90 CR218A +3.3V Rising Edge Data Strobe LV DS 21-Bit Channel Link - 12 MHz to 85 M Hz Check for Samples: DS90CR218A FEATU RES 1 • 12 to 85 MHz Shift Clock Supp ort • 50% Duty Cycle on Receiver Outp ut Clock • Low Power Consumption • ±1V Common-mode Range (Around +1.2V) Narrow Bus Reduces Cable Size and Co st • Up to 1.785 Gbps Throughput • Up to 223 Mbytes/sec Bandwidth • 345 mV (typ) Swing LVDS Devices for Low EMI • PLL Requires No External Component s • Rising Edge Data Strobe • Compa tible with TIA/EIA-644 LVDS Standard Low Profile 48-Lead TSSOP Package DE SCRIPTION The DS90CR218A receiver deser ializes three input LVDS data streams i nto 21 bits of CMOS/TTL output data. Wh en operating at the maximum input clock rate of 85 Mhz, the LVDS data is recei ved at 595 Mbps per data channel for a total data throughput of 1.785 Gbit/sec (233 Mbytes/sec). The narrow bus and LVDS signalling of the DS90CR218A is an ideal means to.
Keywords DS90CR218A, datasheet, pdf, etcTI, +3.3V, Rising, Edge, Data, Strobe, LVDS, S90CR218A, 90CR218A, 0CR218A, DS90CR218, DS90CR21, DS90CR2, Equivalent, stock, pinout, distributor, price, schematic, inventory, databook, Electronic, Components, Parameters, parts, cross reference, chip, Semiconductor, circuit, Electric, manual, substitute




@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)