DS90CR216A-Q1

Product Folder Sample & Buy Technical Documents Tools & Software Support & Community DS90CR216A, DS90CR286A, DS90CR286A-Q1 SNLS043H – MAY 2000 – REVISED JANUARY 2016 DS90CR286A/-Q1 (or DS90CR216A) 3.3-V Rising Edge Data Strobe LVDS Receiver 28-Bit (or 21-Bit) Channel Link-66 MHz 1 Features 1 20 to 66 MHz Shift Clock Support 50% Duty Cycle on Receiver Output Clock Best–in–Class Set and Hold Times on Rx Outputs Rx Power Consumption < 270 mW (Typ) at 66 MHz Worst Case Rx Power-Down Mode < 200 μW (Max) ESD Rating > 7 kV (HBM), > 700 V (EIAJ) PLL Requires No External Components Compatible with TIA/EIA-644 LVDS Standard Low Profile 56-Pin or 48-Pin DGG (TSSOP) Package Operating Temperature: −40°C to 85°C Automotive Q Grade Available - AEC-Q100 Grade 3 Qualified 2 Applications Video Displays Automotive Infotainment Industrial Printers and Imaging Digital Video Transport Machine Vision 3 Description The DS90CR286A receiver converts the four LVDS data streams back into parallel 28 bits of LVCMOS data. Also available is the DS90CR216A receiver that converts the three LVDS data streams back into parallel 21 bits of LVCMOS data. The outputs of both receivers strobe on the rising edge. The receiver LVDS clock operates at rates from 20 to 66 MHz. The device phase-locks to the input clock, samples the serial bit streams at the LVDS data lines, and converts them into parallel output data. At an incoming clock rate of 66 MHz, each LVDS input line is runni...