DS90CR286AT-Q1 LVDS Receiver Datasheet

DS90CR286AT-Q1 Datasheet, PDF, Equivalent


Part Number

DS90CR286AT-Q1

Description

3.3 V Rising Edge Data Strobe LVDS Receiver

Manufacture

etcTI

Total Page 29 Pages
Datasheet
Download DS90CR286AT-Q1 Datasheet


DS90CR286AT-Q1
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DS90CR286AT-Q1
SNLS498A – NOVEMBER 2015 – REVISED DECEMBER 2015
DS90CR286AT-Q1 3.3 V Rising Edge Data Strobe
LVDS Receiver 28-Bit Channel Link 66 MHz
1 Features
1 20 to 66 MHz Shift Clock Support
• 50% Duty Cycle on Receiver Output Clock
• Best–in–Class Setup & Hold Times on Rx Outputs
• Rx Power Consumption < 270 mW (typ) at 66
MHz Worst Case
• Rx Power-down Mode < 200 μW (max)
• ESD Rating: 4 kV (HBM), 1 kV (CDM)
• PLL Requires No External Components
• Compatible with TIA/EIA-644 LVDS Standard
• Low Profile 56-Pin DGG (TSSOP) Package
• Operating Temperature: 40°C to +105°C
• Automotive AEC-Q100 Grade 2 Qualified
2 Applications
• Video Displays
• Automotive Infotainment
• Industrial Printers and Imaging
• Digital Video Transport
• Machine Vision
• OpenLDI-to-RGB Bridge
3 Description
The DS90CR286AT-Q1 receiver converts four LVDS
(Low Voltage Differential Signaling) data streams
back into parallel 28 bits of LVCMOS data. The
receiver data outputs strobe on the output clock's
rising edge.
The receiver LVDS clock operates at rates from 20 to
66 MHz. The DS90CR286AT-Q1 phase-locks to the
input LVDS clock, samples the serial bit streams at
the LVDS data lines, and converts them into 28-bit
parallel output data. At an incoming clock rate of 66
MHz, each LVDS input line is running at a bit rate of
462 Mbps, resulting in a maximum throughput of
1.848 Gbps.
The DS90CR286AT-Q1 device is enhanced over
prior generation receivers due to a wider data valid
time on the receiver output. The DS90CR286AT-Q1
is designed for PCB board chip-to-chip OpenLDI-to-
RGB bridge conversion. LVDS data transmission over
cable interconnect is not recommended for this
device.
Users designing a sub-system with a compatible
OpenLDI transmitter and DS90CR286AT-Q1 receiver
must ensure an acceptable skew margin budget
(RSKM). Details regarding RSKM can be found in the
Application Information section.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
DS90CR286AT-Q1
TSSOP (56) 14.00 mm × 6.10 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
PCB Trace
Typical Application Block Diagram
DS90CR286AT-Q1 28-Bit Rx
LVDS Data
RxOUT[27:0]
24-Bit RGB Display Unit
Graphics Processor Unit (GPU)
28-Bit Tx Data
(4 LVDS Data, 1 LVDS Clock)
LVDS Clock
RxCLK
PLL
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

DS90CR286AT-Q1
DS90CR286AT-Q1
SNLS498A – NOVEMBER 2015 – REVISED DECEMBER 2015
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information .................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Switching Characteristics .......................................... 6
6.7 Typical Characteristics ............................................ 10
7 Detailed Description ............................................ 12
7.1 Overview ................................................................. 12
7.2 Functional Block Diagram ....................................... 12
7.3 Feature Description................................................. 12
7.4 Device Functional Modes........................................ 13
8 Application and Implementation ........................ 14
8.1 Application Information............................................ 14
8.2 Typical Application ................................................. 14
9 Power Supply Recommendations...................... 19
10 Layout................................................................... 19
10.1 Layout Guidelines ................................................. 19
10.2 Layout Example .................................................... 19
11 Device and Documentation Support ................. 21
11.1 Documentation Support ....................................... 21
11.2 Community Resources.......................................... 21
11.3 Trademarks ........................................................... 21
11.4 Electrostatic Discharge Caution ............................ 21
11.5 Glossary ................................................................ 21
12 Mechanical, Packaging, and Orderable
Information ........................................................... 21
4 Revision History
Changes from Original (November 2015) to Revision A
Page
• Changed Product Preview to full datasheet Production Data release ................................................................................... 1
2 Submit Documentation Feedback
Product Folder Links: DS90CR286AT-Q1
Copyright © 2015, Texas Instruments Incorporated


Features Product Folder Sample & Buy Technical Documents Tools & Software Support & Community DS90CR286AT-Q1 SNLS498A – NOVEMBER 2015 – REVISED DECEMBER 2015 DS90CR286AT-Q1 3.3 V Rising Edge Data Strobe LVDS Receiver 28-Bit Channel Lin k 66 MHz 1 Features •1 20 to 66 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Best–in Class Setup & Hold Times on Rx Output s • Rx Power Consumption < 270 mW (ty p) at 66 MHz Worst Case • Rx Power-do wn Mode < 200 μW (max) • ESD Rating: 4 kV (HBM), 1 kV (CDM) • PLL Require s No External Components • Compatible with TIA/EIA-644 LVDS Standard • Low Profile 56-Pin DGG (TSSOP) Package • Operating Temperature: −40°C to +10 5°C • Automotive AEC-Q100 Grade 2 Qu alified 2 Applications • Video Displa ys • Automotive Infotainment • Indu strial Printers and Imaging • Digital Video Transport • Machine Vision • OpenLDI-to-RGB Bridge 3 Description T he DS90CR286AT-Q1 receiver converts four LVDS (Low Voltage Differential Signaling) data streams back into para.
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