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DSSHA1 Dataheets PDF



Part Number DSSHA1
Manufacturers Maxim Integrated
Logo Maxim Integrated
Description Memory-Mapped SHA-1 Coprocessor
Datasheet DSSHA1 DatasheetDSSHA1 Datasheet (PDF)

DSSHA1 19-5870; Rev 0; 5/11 Memory-Mapped SHA-1 Coprocessor General Description The DSSHA1 coprocessor with 64-byte RAM is a synthesizable register transfer level (RTL) implementation of the FIPS 180-3 Secure Hash Algorithm (SHA-1), eliminating the need to develop software to perform the complex SHA-1 computation required for authenticating SHA-1 devices. The DSSHA1 can compute SHA-1 message authentication codes (MACs) for use with Maxim SHA-1 devices, such as the DS1963S, DS1961S, DS28E10, D.

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