CY74FCT16373T

Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered. CY74FCT16373T CY74FCT162373T SCCS054C - August 1994 - Revised October 2003 Features Ioff supports partial-power-down mode operation Edge-rate control circuitry for significantly improved noise characteristics Typical output skew < 250 ps ESD > 2000V TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages Industrial temperature range of −40˚C to +85˚C VCC = 5V ± 10% CY74FCT16373T Features: 64 mA sink current, 32 mA source current Typical VOLP (ground bounce) <1.0V at VCC = 5V, TA = 25˚C CY74FCT162373T Features: Balanced 24 mA output drivers Reduced system switching noise Typical VOLP (ground bounce) <0.6V at VCC = 5V, TA= 25˚C 16-Bit Latches Functional Description CY74FCT16373T and CY74FCT162373T are 16-bit D-type latches designed for use in bus applications requiring high speed and low power. These devices can be used as two independent 8-bit latches or as a single 16-bit latch by connecting the Output Enable (OE) and Latch (LE) inputs. Flow-through pinout and small shrink packaging aid in simplifying board layout. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The CY74FCT16373T is ideally suited for driving high-capacitance loads and low-impedance backplanes. The CY74FCT162373T has 24-mA bala...