DC/DC Converter. TPS55340-Q1 Datasheet

TPS55340-Q1 Converter. Datasheet pdf. Equivalent

TPS55340-Q1 Datasheet
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Part TPS55340-Q1
Description Boost/SEPIC/Flyback DC/DC Converter
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TPS55340-Q1
SLVSBV5B – JUNE 2014 – REVISED JANUARY 2019
TPS55340-Q1 Integrated 5-A, Wide Input Range
Boost, SEPIC, or Flyback DC/DC Converter
1 Features
1 Qualified for Automotive Applications
• AEC-Q100 Qualified With the Following Results:
– Device Temperature Grade 1: –40°C to 125°C
– Device HBM ESD Classification Level 2
– Device CDM ESD Classification Level C6
• Internal 5-A, 40-V Low-Side MOSFET Switch
• 2.9 to 38-V Input Voltage Range
• ±0.7% Reference Voltage
• 0.5-mA Operating Quiescent Current
• 2.7-µA Shutdown Supply Current
• Fixed-Frequency Current Mode PWM Control
• Frequency Adjustable from 100 kHz to 2.5 MHz
(see Switching Frequency)
• Synchronization Capability to External Clock
• Adjustable Soft-Start Time
• Pulse-Skipping for Higher Efficiency at Light
Loads
• Cycle-by-Cycle Current-Limit, Thermal Shutdown,
and UVLO Protection
• WQFN-16 (3 mm × 3 mm) Package with
PowerPad™
• Wide –40°C to +150°C Operating TJ Range
• Create a Custom Design Using the TPS55340-Q1
with the WEBENCH Power Designer
2 Applications
• Boost, SEPIC, and Flyback Topologies
• Automotive Pre-Boost Applications to Support
Start-Stop Requirements
• USB Power Delivery
• Industrial Power Systems
3 Description
The TPS55340-Q1 device is a monolithic non-
synchronous switching converter with integrated 5-A,
40-V power switch. The device can be configured in
several standard switching-regulator topologies,
including boost, SEPIC and isolated flyback. The
device has a wide input voltage range to support
applications with input voltage from 2.9 to 38-V.
The TPS55340-Q1 device regulates the output
voltage with current mode PWM (pulse width
modulation) control, and has an internal oscillator.
The switching frequency of PWM is set by either an
external resistor or by synchronizing to an external
clock signal. The user can program the switching
frequency from 100 kHz to 2.5 MHz.
The device features a programmable soft-start
function to limit inrush current during start-up and has
other built-in protection features including cycle-by-
cycle over current-limit and thermal shutdown.
The TPS55340-Q1 device is available in a small 3-
mm × 3-mm 16-pin WQFN package with PowerPad
for enhanced thermal performance.
Typical Application for Boost
VI L D
R(FREQ)
CSS
CI
R(C)
C(C)
TPS55340-Q1
VIN SW
EN SW
FREQ
SW
SS FB
COMP PGND
SYNC PGND
AGND PGND
R(SH)
R(SL)
VO
CO
1
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
TPS55340-Q1
WQFN (16)
3.00 mm × 3.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Efficiency vs Output Current
100
95
90
85
80
75
70
65 VVII == 55 VV
60 VO = 24 V VII == 1122 VV
55
ƒS = 600 kHz
VVII == 1155 VV
50
0.0 0.4 0.8 1.2 1.6 2.0 2.4
Output Current (A)
C021
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.



Texas Instruments TPS55340-Q1
TPS55340-Q1
SLVSBV5B – JUNE 2014 – REVISED JANUARY 2019
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ..................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information .................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Typical Characteristics .............................................. 6
7 Detailed Description .............................................. 9
7.1 Overview ................................................................... 9
7.2 Functional Block Diagram ......................................... 9
7.3 Feature Description................................................... 9
7.4 Device Functional Modes........................................ 12
8 Application and Implementation ........................ 14
8.1 Application Information............................................ 14
8.2 Typical Applications ................................................ 14
9 Power Supply Recommendations...................... 29
10 Layout................................................................... 29
10.1 Layout Guidelines ................................................. 29
10.2 Layout Example .................................................... 29
11 Device and Documentation Support ................. 30
11.1 Device Support...................................................... 30
11.2 Receiving Notification of Documentation Updates 30
11.3 Community Resources.......................................... 30
11.4 Trademarks ........................................................... 30
11.5 Electrostatic Discharge Caution ............................ 30
11.6 Glossary ................................................................ 30
12 Mechanical, Packaging, and Orderable
Information ........................................................... 31
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (July 2016) to Revision B
Page
• Added links for Webench ....................................................................................................................................................... 1
• Added text note under pin configuration diagram. ................................................................................................................ 3
Changes from Original (June 2014) to Revision A
Page
• Changed the Applications section .......................................................................................................................................... 1
• Changed title from DC-DC Regulator to DC-DC Converter ................................................................................................... 1
• Changed the Handling Ratings table to ESD Ratings and moved the storage temperature to the Absolute Maximum
Ratings table........................................................................................................................................................................... 4
• Changed the Switching Frequency section to add recommendation for using an external synchronous clock when
setting the switching frequency higher than 1.2 MHz........................................................................................................... 10
• Changed the equation to calculate R3 in the Compensating the Control Loop (R3, C4, and C5) section .......................... 22
• Added the Receiving Notification of Documentation Updates and Community Resources sections .................................. 30
2 Submit Documentation Feedback
Copyright © 2014–2019, Texas Instruments Incorporated
Product Folder Links: TPS55340-Q1



Texas Instruments TPS55340-Q1
www.ti.com
5 Pin Configuration and Functions
16-Pin QFN With PowerPAD
RTE Package
Top View
TPS55340-Q1
SLVSBV5B – JUNE 2014 – REVISED JANUARY 2019
16 15 14 13
SW 1
12 PGND
VIN 2
11 PGND
EN 3
SS 4
PowerPAD
10 NC
9 FREQ
5678
TI recommends connecting NC with AGND.
NAME
AGND
PIN
COMP
EN
FB
NO.
6
7
3
8
FREQ
NC
PGND
SS
SW
SYNC
9
10
14
11
12
13
4
1
15
16
5
VIN 2
PowerPAD
Pin Functions
DESCRIPTION
Signal ground of the IC
Output of the transconductance error amplifier. An external RC network connected to this pin compensates the regulator
feedback loop.
Enable pin. When the voltage of this pin falls below the enable threshold for more than 1 ms, the IC turns off.
Error amplifier input and feedback pin for positive voltage regulation. Connect the FB pin to the center tap of a resistor divider
to program the output voltage.
Switching frequency program pin. An external resistor connected between the FREQ pin and the AGND pin sets the switching
frequency.
This pin is reserved and must be connected to ground.
Power ground of the IC. The PGND pin is connected to the source of the internal power MOSFET switch.
Soft-start programming pin. A capacitor between the SS pin and AGND pin programs soft-start timing.
SW is the drain of the internal power MOSFET. Connect the SW pin to the switched side of the boost or SEPIC inductor or the
flyback transformer.
Switching-frequency synchronization pin. An external clock signal can set the switching frequency between 200 kHz and 1
MHz. If this pin is not used, it must be tied to AGND.
The input supply pin to the IC. Connect the VIN pin to a supply voltage between 2.9 V and 32 V. The voltage on the VIN pin
can be different from the boost power-stage input.
The PowerPAD must be soldered to the AGND. If possible, use thermal vias to connect the PowerPAD to PCB ground-plane
layers for improved power dissipation.
Copyright © 2014–2019, Texas Instruments Incorporated
Product Folder Links: TPS55340-Q1
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