DC/DC Converter. TPS55010 Datasheet

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TPS55010 Datasheet
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Part TPS55010
Description DC/DC Converter
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Texas Instruments TPS55010
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TPS55010
SLVSAV0B – APRIL 2011 – REVISED OCTOBER 2014
TPS55010 2.95-V To 6-V Input, 2 W, Isolated DC/DC Converter with Integrated FETs
1 Features
1 Isolated Fly-Buck™ Topology
• Primary Side Feedback
• 100 kHz to 2000 kHz Switching Frequency
• Synchronizes to External Clock
• Adjustable Slow Start
• Adjustable Input Voltage UVLO
• Open Drain Fault Output
• Cycle-by-Cycle Current Limit
• Thermal Shutdown Protection
• 3 mm x 3 mm 16 Pin QFN Package
2 Applications
• Noise Immunity in PLCs, Data Acquisition and
Measurement Equipment
• Isolated RS-232 and RS-485 Communication
Channels
• Powers Line Drivers, ISO Amplifiers, Sensors,
CAN Transceivers
• Floating Supplies for IGBT Gate Drivers
• Promotes Safety in Medical Equipment
3 Description
The TPS55010 is a transformer driver designed to
provide isolated power for isolated interfaces, such as
RS-485 and RS-232, from 3.3 V or 5 V input supply.
The device uses fixed frequency current mode control
and half bridge power stage with primary side
feedback to regulate the output voltage for power
levels up to 2W. The switching frequency is
adjustable from 100 kHz to 2000 kHz so solution size,
efficiency and noise can be optimized. The switching
frequency is set with a resistor or is synchronized to
external clock using the RT/CLK pin. To minimize
inrush currents, a small capacitor can be connected
to the SS pin. The EN pin can be used as an enable
pin or to increase the default input UVLO voltage
from 2.6V.
With the same transformer the TPS55010 can
provide a solution for different input and output
voltage combinations by adjusting the primary side
voltage. Off the shelf transformers are available to
provide single positive, or dual positive and negative
output voltages.
The TPS55010 is available in a 3mm x 3mm 16 pin
QFN package with thermal pad.
Device Information (1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
TPS55010
WQFN (16)
3.00 mm × 3.00 mm
(1) For all available packages, see the orderable addendum at he
end of the datasheet.
4 Simplified Schematic
3V
to
5.5 V
CIN
VIN BOOT
TPS55010 Cboot
T1
1:2.5
5V
200mA
EN
FAULT
PH
RHS
CO
+
VO
_
SS VSENSE
RT/CLK
Css
COMP
Rt RC
RLS
CPRI
GND
CC
100
90
80
70
60
50
40
30
20
10
0
0.00
Efficiency vs Load Current
0.05
VOUT = 5V
FSW = 350kHz
0.10 0.15 0.20
Output Current (A)
VIN = 5V
0.25 0.30
G040
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.



Texas Instruments TPS55010
TPS55010
SLVSAV0B – APRIL 2011 – REVISED OCTOBER 2014
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Simplified Schematic............................................. 1
5 Revision History..................................................... 2
6 Pin Configuration and Functions ......................... 3
7 Specifications......................................................... 4
7.1 Absolute Maximum Ratings ..................................... 4
7.2 Handling Rating......................................................... 4
7.3 Recommended Operating Conditions....................... 4
7.4 Thermal Information .................................................. 5
7.5 Electrical Characteristics........................................... 5
7.6 Timing Requirements ................................................ 6
7.7 Switching Characteristics .......................................... 6
7.8 Typical Characteristics .............................................. 7
8 Detailed Description ............................................ 10
8.1 Overview ................................................................. 10
8.2 Functional Block Diagram ....................................... 10
8.3 Feature Description................................................. 11
8.4 Device Functional Modes........................................ 14
9 Application And Implementation........................ 17
9.1 Application Information............................................ 17
9.2 Typical Applications ................................................ 17
9.3 Typical Application, Dual Output............................. 29
10 Power Supply Recommendations ..................... 37
11 Layout................................................................... 37
11.1 Layout Guidelines ................................................. 37
11.2 Layout Example .................................................... 37
12 Device and Documentation Support ................. 38
12.1 Device Support...................................................... 38
12.2 Trademarks ........................................................... 38
12.3 Electrostatic Discharge Caution ............................ 38
12.4 Glossary ................................................................ 38
13 Mechanical, Packaging, and Orderable
Information ........................................................... 38
5 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (June 2011) to Revision B
Page
• Changed Added the Device information table, Handling Ratings table, Applications and Implementation section,
Layout section, and the Device and Documentation Support section.................................................................................... 1
• Added the Handling Rating table............................................................................................................................................ 4
• Added the Recommended Operating Conditions table .......................................................................................................... 4
• Added Figure 23 ................................................................................................................................................................... 23
• Added Figure 24 .................................................................................................................................................................. 24
• Changed Figure 26 through Figure 28 ................................................................................................................................ 26
• Changed Figure 40 .............................................................................................................................................................. 27
• Changed Figure 42 through Figure 44 ................................................................................................................................ 34
• Changed Figure 54 .............................................................................................................................................................. 35
Changes from Original (April 2010) to Revision A
Page
• Changed the device status From: Product Preview To: Production....................................................................................... 1
2 Submit Documentation Feedback
Product Folder Links: TPS55010
Copyright © 2011–2014, Texas Instruments Incorporated



Texas Instruments TPS55010
www.ti.com
6 Pin Configuration and Functions
RTE PACKAGE
(TOP VIEW)
TPS55010
SLVSAV0B – APRIL 2011 – REVISED OCTOBER 2014
VIN 1
VIN 2
GND 3
GND 4
16 15 14 13
Thermal
Pad
(17)
12 PH
11 PH
10 PH
9 SS
5 67 8
Name
VIN
GND
VSENSE
COMP
Number
1, 2, 16
3, 4, 5
6
7
RT/CLK
8
SS
PH
BOOT
9
10, 11, 12
13
FAULT
EN
14
15
THERMAL PAD 17
Pin Functions
Description
Supplies the control circuitry and switches of the power converter.
Power Ground. This pin should be electrically connected directly to the thermal pad under the IC.
Inverting node of the transconductance error amplifier.
Error amplifier output, and input to the output switch current comparator. Connect frequency
compensation components to this pin.
Resistor Timing and External Clock. An internal amplifier holds this pin at a fixed voltage when
using an external resistor to ground to set the switching frequency. If the pin is pulled above the
PLL upper threshold, a mode change occurs and the pin becomes a synchronization input. The
internal amplifier is disabled and the pin is a high impedance clock input to the internal PLL. If
clocking edges stop, the internal amplifier is re-enabled and the mode returns to a resistor set
function.
Slow-start. An external capacitor connected to this pin sets the output rise time.
The source of the internal high side power MOSFET, and drain of the internal low side MOSFET.
A bootstrap capacitor is required between BOOT and PH. If the voltage on this capacitor is below
the minimum required by the output device, the output is forced to switch off until the capacitor is
refreshed.
An open drain output. Active low if the output voltage is low due to thermal shutdown, dropout,
overvoltage or EN shut down.
Enable pin, internal pull-up current source. Pull below 1.2V to disable. Float to enable. Adjust the
input undervoltage lockout with two resistors.
GND pin should be connected to the exposed thermal pad for proper operation. This thermal pad
should be connected to any internal PCB ground plane using multiple vias for good thermal
performance.
Copyright © 2011–2014, Texas Instruments Incorporated
Product Folder Links: TPS55010
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