Analog Switch. DG2043 Datasheet

DG2043 Switch. Datasheet pdf. Equivalent

DG2043 Datasheet
Recommendation DG2043 Datasheet
Part DG2043
Description Quad SPST Analog Switch
Feature DG2043; DG2041, DG2042, DG2043 Vishay Siliconix Low-Voltage, Low RON Quad SPST Analog Switch DESCRIPTION Th.
Manufacture Vishay
Datasheet
Download DG2043 Datasheet




Vishay DG2043
DG2041, DG2042, DG2043
Vishay Siliconix
Low-Voltage, Low RON Quad SPST Analog Switch
DESCRIPTION
The DG2041/2042/2043 are quad single-pole/single-throw
monolithic CMOS analog switch designed for high
performance switching of analog signals. Combining low
power, fast switching, low on-resistance (RDS(on): 1 at
2.7 V) and small physical size, the DG2041/2042/2043 are
ideal for portable and battery powered applications requiring
high performance and efficient use of board space.
The DG2041/2042/2043 are built on Vishay Siliconix’s new
high density low voltage process. An epitaxial layer prevents
latchup.
Each switch conducts equally well in both directions when
on, and blocks up to the power supply level when off.
FEATURES
• Low Voltage Operation (1.8 V to 5.5 V)
• Low On-Resistance - RDS(on): 1
• Fast Switching - 14 ns tON
• Low Charge Injection - QINJ: 1 pC
• Low Power Consumption
• TTL/CMOS Compatible
• TSSOP-16 and QFN-16 Packages
Material categorization: For definitions of compliance
please see www.vishay.com/doc?99912
BENEFITS
• Reduced Power Consumption
• Simple Logic Interface
• High Accuracy
• Reduce Board Space
APPLICATIONS
• Cellular Phones
• Communication Systems
• Portable Test Equipment
• Battery Operated Systems
• Sample and Hold Circuits
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION - DG2041
DG2041DN
QFN-16 (4 x 4)
16 15 14 13
NC1 1
N.C. 2
GND 3
NC4 4
Top View
12 NC2
11 V+
10 N.C.
9 NC3
5678
DG2041DQ
TSSOP
IN1 1
COM1 2
NC1 3
N.C. 4
GND 5
NC4 6
COM4 7
IN4 8
Top View
16 IN2
15 COM2
14 NC2
13 V+
12 N.C.
11 NC3
10 COM3
9 IN3
TRUTH TABLE - DG2041
Logic
0
1
Switches Shown for Logic “0” Input
Switch
On
Off
Document Number: 72091
For technical questions, contact: pmostechsupport@vishay.com
www.vishay.com
S13-1285-Rev. C, 27-May-13
1
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000



Vishay DG2043
DG2041, DG2042, DG2043
Vishay Siliconix
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION - DG2042, DG2043
DG2042DN
QFN-16 (4 x 4)
16 15 14 13
NO1 1
N.C. 2
GND 3
NO4 4
Top View
12 NO2
11 V+
10 N.C.
9 NO3
5678
DG2042DQ
TSSOP
IN1 1
COM1 2
NO1 3
N.C. 4
GND 5
NO4 6
COM4 7
IN4 8
Top View
16 IN2
15 COM2
14 NO2
13 V+
12 N.C.
11 NO3
10 COM3
9 IN3
TRUTH TABLE - DG2042
Logic
0
1
Switches Shown for Logic “0” Input
DG2043DN
QFN-16 (4 x 4)
16 15 14 13
NO1 1
N.C. 2
GND 3
NO4 4
Top View
12 NC2
11 V+
10 N.C.
9 NC3
5678
Switch
Off
On
DG2043DQ
TSSOP
IN1 1
COM1 2
NO1 3
N.C. 4
GND 5
NO4 6
COM4 7
IN4 8
Top View
16 IN2
15 COM2
14 NC2
13 V+
12 N.C.
11 NC3
10 COM3
9 IN3
TRUTH TABLE - DG2043
Logic
0
1
Switches Shown for Logic”0” Input
Switches 1, 4
Off
On
Switches 2, 3
On
Off
www.vishay.com
For technical questions, contact: pmostechsupport@vishay.com
Document Number: 72091
2 S13-1285-Rev. C, 27-May-13
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000



Vishay DG2043
DG2041, DG2042, DG2043
Vishay Siliconix
ORDERING INFORMATION
Temp Range
- 40 °C to 85 °C
Package
TSSOP-16
QFN-16 (4 mm x 4 mm)
(Variation 1)
Part Number
DG2041DQ-T1
DG2041DQ-T1-E3
DG2042DQ-T1
DG2042DQ-T1-E3
DG2043DQ-T1
DG2043DQ-T1-E3
DG2041DN-T1-E4
DG2042DN-T1-E4
DG2043DN-T1-E4
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Limit
Unit
Reference V+ to GND
IN, COM, NC, NOa
- 0.3 to + 6
- 0.3 to (V+ + 0.3)
V
Continuous Current (Any terminal)
Peak Current (Pulsed at 1 ms, 10 % duty cycle)
± 50
± 200
mA
Storage Temperature (D Suffix)
- 65 to 150
°C
Power Dissipation (Packages)b
TSSOP-16c
QFN-16 (4 mm x 4 mm)d
450
1880
mW
Notes:
a. Signals on NC, NO, or COM or IN exceeding V+ will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC board.
c. Derate 5.6 mW/°C above 70 °C
d. Derate 23.5 mW/°C above 70 °C
e. Manual soldering with soldering iron is not recommended for leadless components. The QFN is a leadless package. The end of the lead
terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper lip cannot
be guaranteed and is not required to ensure adequate bottom side solder interconnection.
SPECIFICATIONS (V+ = 2 V)
Parameter
Analog Switch
Analog Signal Ranged
On- Resistance
RON Flatnessd
RON Match Between Channels
Switch Off Leakage Currentf
Symbol
VNO, VNC
VCOM
RON
RON
Flatness
RON
INO(off)
INC(off)
ICOM(off)
Channel-On Leakage Currentf ICOM(on)
Test Conditions
Otherwise Unless Specified
V+ = 2 V, VIN = 0.4 V or 1.6 Ve
V+ = 2 V, VCOM = 0.2 V/1.2 V, INO, INC = 10 mA
V+ = 2 V, VCOM = 0 V to V+, INO, INC = 10 mA
V+ = 2.2 V
VNO, VNC = 0.2 V/2 V, VCOM = 2 V/0.2 V
V+ = 2.2 V, VNO, VNC = VCOM = 0.2 V/2 V
Temp.a
Full
Room
Full
Room
Room
Room
Fulld
Room
Fulld
Room
Fulld
Limits
- 40 °C to 85 °C
Min.b Typ.c Max.b
0
3
-1
- 10
-1
- 10
-1
- 10
V+
6.3
6.3
4.2
0.4
1
10
1
10
1
10
Unit
V
nA
Document Number: 72091
For technical questions, contact: pmostechsupport@vishay.com
www.vishay.com
S13-1285-Rev. C, 27-May-13
3
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000







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