D-TYPE FLIP-FLOPS. SN54AHC174 Datasheet

SN54AHC174 FLIP-FLOPS. Datasheet pdf. Equivalent

SN54AHC174 Datasheet
Recommendation SN54AHC174 Datasheet
Part SN54AHC174
Description HEX D-TYPE FLIP-FLOPS
Feature SN54AHC174; D Operating Range 2-V to 5.5-V VCC D Contain Six Flip-Flops With Single-Rail Outputs D Applications .
Manufacture etcTI
Datasheet
Download SN54AHC174 Datasheet




Texas Instruments SN54AHC174
D Operating Range 2-V to 5.5-V VCC
D Contain Six Flip-Flops With Single-Rail
Outputs
D Applications Include:
– Buffer/Storage Registers
– Shift Registers
– Pattern Generators
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
description
The ’AHC174 devices are positive-edge-triggered
D-type flip-flops with a direct clear (CLR) input and
are designed for 2-V to 5.5-V VCC operation.
Information at the data (D) inputs that meets the
setup time requirements is transferred to the
outputs on the positive-going edge of the clock
(CLK) pulse. Clock triggering occurs at a
particular voltage level and is not directly related
to the transition time of the positive-going edge of
CLK. When CLK is at either the high or low level,
the D input has no effect at the output.
SN54AHC174, SN74AHC174
HEX D-TYPE FLIP-FLOPS
WITH CLEAR
SCLS425F – JUNE 1998 – REVISED FEBRUARY 2002
SN54AHC174 . . . J OR W PACKAGE
SN74AHC174 . . . D, DB, DGV, N, NS, OR PW PACKAGE
(TOP VIEW)
CLR
1Q
1D
2D
2Q
3D
3Q
GND
1
2
3
4
5
6
7
8
16 VCC
15 6Q
14 6D
13 5D
12 5Q
11 4D
10 4Q
9 CLK
SN54AHC174 . . . FK PACKAGE
(TOP VIEW)
3 2 1 20 19
1D 4
18 6D
2D 5
17 5D
NC 6
16 NC
2Q 7
15 5Q
3D 8
14 4D
9 10 11 12 13
NC – No internal connection
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP – N
Tube
SN74AHC174N
SN74AHC174N
SOIC – D
Tube
Tape and reel
SN74AHC174D
SN74AHC174DR
AHC174
–40°C to 85°C
SOP – NS
Tube
SN74AHC174NSR
AHC174
SSOP – DB
Tape and reel SN74AHC174DBR
HA174
TSSOP – PW
Tape and reel SN74AHC174PWR
HA174
TVSOP – DGV
Tape and reel SN74AHC174DGVR
HA174
CDIP – J
Tube
SNJ54AHC174J
SNJ54AHC174J
–55°C to 125°C CFP – W
Tube
SNJ54AHC174W
SNJ54AHC174W
LCCC – FK
Tube
SNJ54AHC174FK
SNJ54AHC174FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 2002, Texas Instruments Incorporated
1



Texas Instruments SN54AHC174
SN54AHC174, SN74AHC174
HEX D-TYPE FLIP-FLOPS
WITH CLEAR
SCLS425F JUNE 1998 REVISED FEBRUARY 2002
logic diagram (positive logic)
CLR 1
9
CLK
1D 3
FUNCTION TABLE
(each flip-flop)
INPUTS
CLR CLK D
OUTPUT
Q
LXX
L
HH
H
HL
L
HLX
Q0
1D
C1
R
2 1Q
To Five Other Channels
Pin numbers shown are for the D, DB, DGV, J, N, NS, PW, and W packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82°C/W
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under absolute maximum ratingsmay cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditionsis not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265



Texas Instruments SN54AHC174
SN54AHC174, SN74AHC174
HEX D-TYPE FLIP-FLOPS
WITH CLEAR
SCLS425F JUNE 1998 REVISED FEBRUARY 2002
recommended operating conditions (see Note 3)
SN54AHC174 SN74AHC174
UNIT
MIN MAX MIN MAX
VCC Supply voltage
VIH High-level input voltage
VIL Low-level input voltage
VI Input voltage
VO Output voltage
IOH High-level output current
IOL Low-level output current
Dt /Dv Input transition rise or fall rate
TA Operating free-air temperature
VCC = 2 V
VCC = 3 V
VCC = 5.5 V
VCC = 2 V
VCC = 3 V
VCC = 5.5 V
VCC = 2 V
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V
VCC = 2 V
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V
2 5.5
2 5.5 V
1.5 1.5
2.1 2.1 V
3.85 3.85
0.5 0.5
0.9 0.9 V
1.65 1.65
0 5.5
0 5.5 V
0 VCC
50
0 VCC
50
V
mA
4 4
mA
8 8
50 50 mA
44
mA
88
100 100
ns / V
20 20
55 125 40
85 °C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25°C
SN54AHC174 SN74AHC174
MIN TYP MAX MIN MAX MIN MAX
VOH
IOH = 50 mA
IOH = 4 mA
2 V 1.9 2 1.9 1.9
3 V 2.9 3 2.9 2.9
4.5 V
4.4 4.5
4.4
4.4
3 V 2.58
2.48 2.48
VOL
IOH = 8 mA
IOL = 50 mA
IOL = 4 mA
4.5 V
2V
3V
4.5 V
3V
3.94
3.8 3.8
0.1 0.1 0.1
0.1 0.1 0.1
0.1 0.1 0.1
0.36 0.5 0.44
IOL = 8 mA
II VI = 5.5 V or GND
4.5 V
0 V to 5.5 V
0.36
± 0.1
0.5 0.44
± 1* ± 1
ICC
VI = VCC or GND,
IO = 0
5.5 V
4 40 40
Ci VI = VCC or GND
5 V 1.7 10
10
* On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V.
UNIT
V
V
mA
mA
pF
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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