DatasheetsPDF.com

SN74LV573AT

Texas Instruments

OCTAL TRANSPARENT D-TYPE LATCH

www.ti.com FEATURES • Inputs Are TTL-Voltage Compatible • 4.5-V to 5.5-V VCC Operation • Typical tpd = 5.1 ns at 5 V • T...


Texas Instruments

SN74LV573AT

File Download Download SN74LV573AT Datasheet


Description
www.ti.com FEATURES Inputs Are TTL-Voltage Compatible 4.5-V to 5.5-V VCC Operation Typical tpd = 5.1 ns at 5 V Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 5 V, TA = 25°C Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 5 V, TA = 25°C Supports Mixed-Mode Voltage Operation on All Ports DB, DGV, DW, NS, OR PW PACKAGE (TOP VIEW) OE 1D 2D 3D 4D 5D 6D 7D 8D GND 1 2 3 4 5 6 7 8 9 10 20 VCC 19 1Q 18 2Q 17 3Q 16 4Q 15 5Q 14 6Q 13 7Q 12 8Q 11 LE SN74LV573AT OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS SCES574C – JUNE 2004 – REVISED AUGUST 2005 Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) xxxxx RGY PACKAGE (TOP VIEW) OE VCC 1D 2 2D 3 3D 4 4D 5 5D 6 6D 7 7D 8 8D 9 1 10 20 19 1Q 18 2Q 17 3Q 16 4Q 15 5Q 14 6Q 13 7Q 12 8Q 11 GND LE DESCRIPTION/ORDERING INFORMATION The SN74LV573AT is an octal transparent D-type latch. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs. TA –40°C to 85°C ORDERING INFORMATION PACKAGE (1) ORDERABLE PART NUMBER TOP-SIDE MARKING QFN – RGY Tape and reel SN74LV573ATRGYR VV573 SOIC – DW Tube Tape and reel SN74LV573ATDW SN74LV573ATDWR LV573AT SOP – NS Tape and reel SN74LV573ATNSR 74LV573AT SSOP – DB Tape and reel...




Similar Datasheet




@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)