Shift Registers. SN74LV595A Datasheet

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SN74LV595A Datasheet
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Part SN74LV595A
Description 8-Bit Shift Registers
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SN74LV595A
SCLS414Q – APRIL 1998 – REVISED APRIL 2016
SN74LV595A 8-Bit Shift Registers With 3-State Output Registers
1 Features
1 2-V to 5.5-V VCC Operation
• Max tpd of 7.1 ns at 5 V
• Typical VOLP (Output Ground Bounce)
< 0.8 V at VCC = 3.3 V, TA = 25°C
• Typical VOHV (Output VOH Undershoot)
> 2.3 V at VCC = 3.3 V, TA = 25°C
• Support Mixed-Mode Voltage Operation on All
Ports
• 8-Bit Serial-In, Parallel-Out Shift
• Ioff Supports Live Insertion, Partial Power-Down
Mode, and Back-Drive Protection
• Shift Register Has Direct Clear
• Latch-Up Performance Exceeds 250 mA Per
JESD 17
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model
– 200-V Machine Model
– 1000-V Charged-Device Model
2 Applications
• Network Switches
• Power Infrastructures
• PCs and Notebooks
• LED Displays
• Servers
• I/O Expanders
3 Description
The SN74LV595A device contains an 8-bit serial-in,
parallel-out shift register that feeds an 8-bit D-type
storage register. Both the shift register clock (SRCLK)
and storage register clock (RCLK) are positive-edge
triggered.
Device Information
PART NUMBER
PACKAGE
BODY SIZE (NOM)
VQFN (16)
4.00 mm × 3.50 mm
SNx4LV595A
TSSOP (16)
SOP (16)
5.00 mm × 4.40 mm
10.20 mm × 5.30 mm
SOIC (16)
9.00 mm × 3.90 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
OE
RCLK
SRCLR
SRCLK
SER
Simplified Schematic
1D Q
C1
R
3D
C3 Q
QA
2D Q
C2
R
3D
C3 Q
QB
2D Q
C2
R
3D
C3 Q
QC
2D Q
C2
R
3D
C3 Q
QD
2D Q
C2
R
3D
C3 Q
QE
2D Q
C2
R
3D
C3 Q
QF
2D Q
C2
R
3D
C3 Q
QG
2D Q
C2
R
3D
C3 Q
QH
QH
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.



Texas Instruments SN74LV595A
SN74LV595A
SCLS414Q – APRIL 1998 – REVISED APRIL 2016
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 5
6.4 Thermal Information .................................................. 5
6.5 Electrical Characteristics........................................... 6
6.6 Timing Requirements, VCC = 2.5 V ± 0.2 V .............. 6
6.7 Timing Requirements, VCC = 3.3 V ± 0.3 V .............. 7
6.8 Timing Requirements, VCC = 5 V ± 0.5 V ................. 7
6.9 Switching Characteristics, VCC = 2.5 V ± 0.2 V ........ 9
6.10 Switching Characteristics, VCC = 3.3 V ± 0.3 V ...... 9
6.11 Switching Characteristics, VCC = 5 V ± 0.5 V ....... 10
6.12 Noise Characteristics ............................................ 10
6.13 Operating Characteristics...................................... 10
6.14 Typical Characteristics .......................................... 11
7 Parameter Measurement Information ................ 12
8 Detailed Description ............................................ 13
8.1 Overview ................................................................. 13
8.2 Functional Block Diagram ....................................... 13
8.3 Feature Description................................................. 14
8.4 Device Functional Modes........................................ 14
9 Application and Implementation ........................ 15
9.1 Application Information............................................ 15
9.2 Typical Application ................................................. 15
10 Power Supply Recommendations ..................... 16
11 Layout................................................................... 16
11.1 Layout Guidelines ................................................. 16
11.2 Layout Example .................................................... 16
12 Device and Documentation Support ................. 17
12.1 Community Resources.......................................... 17
12.2 Trademarks ........................................................... 17
12.3 Electrostatic Discharge Caution ............................ 17
12.4 Glossary ................................................................ 17
13 Mechanical, Packaging, and Orderable
Information ........................................................... 17
4 Revision History
Changes from Revision P (October 2014) to Revision Q
Page
• Changed "Handling Ratings" to "ESD Ratings" ..................................................................................................................... 2
• Changed "I" to "O" on QA row in Pin Functions table ............................................................................................................. 3
• Changed "QA Inout" to "QA Output" in Pin Functions table .................................................................................................... 3
• Changed "Handling Ratings" to "ESD Ratings" ..................................................................................................................... 4
Changes from Revision O (January 2011) to Revision P
Page
• Updated document to new TI data sheet format. ................................................................................................................... 1
• Deleted Ordering Information table. ....................................................................................................................................... 1
• Deleted SN54LV595A from data sheet. ................................................................................................................................. 1
• Changed Ioff bullet in Features................................................................................................................................................ 1
• Added Applications. ................................................................................................................................................................ 1
• Added Pin Functions table...................................................................................................................................................... 3
• Added Handling Ratings table. ............................................................................................................................................... 4
• Changed MAX operating temperature to 125°C in Recommended Operating Conditions table. ......................................... 5
• Added Thermal Information table. .......................................................................................................................................... 5
• Added –40°C to 125°C for SN74LV595A in Electrical Characteristics table.......................................................................... 6
• Added –40°C to 125°C for SN74LV595A in all three Timing Requirements tables. .............................................................. 6
• Added –40°C to 125°C for SN74LV595A in all three Switching Requirements tables. ........................................................ 9
• Added Detailed Description section...................................................................................................................................... 13
• Added Application and Implementation section.................................................................................................................... 15
• Added Power Supply Recommendations and Layout sections............................................................................................ 16
2 Submit Documentation Feedback
Copyright © 1998–2016, Texas Instruments Incorporated
Product Folder Links: SN74LV595A



Texas Instruments SN74LV595A
www.ti.com
5 Pin Configuration and Functions
RGY Package
16-Pin VQFN
Top View
R QC
QD
QE
QF
QG
QH
2
3
4
5
6
7
Thermal
Pad
15
14
13
12
11
10
QA
SER
OE_n
RCLK
SRCLK
SRCLR_n
SN74LV595A
SCLS414Q – APRIL 1998 – REVISED APRIL 2016
TSSOP Package
16-Pin D, DW, or PW
Top View
QB
QC
QD
QE
QF
QG
QH
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VCC
QA
SER
OE_n
RCLK
SRCLK
SRCLR_n
QH'
NAME
GND
OE_n
QA
QB
QC
QD
QE
QF
QG
QH
QH'
RCLK
SER
SRCLK
SRCLR_n
VCC
PIN
NO.
8
13
15
1
2
3
4
5
6
7
9
12
14
11
10
16
Pin Functions
I/O DESCRIPTION
— Ground Pin
I Output Enable Pin
O QA Output
O QB Output
O QC Output
O QD Output
O QE Output
O QF Output
O QG Output
O QH Output
O QH' Output
I RCLK Input
I SER Input
I SRCLK Input
I SRCLR Input
— Power Pin
Copyright © 1998–2016, Texas Instruments Incorporated
Product Folder Links: SN74LV595A
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