Shift/Storage Registers. SN54ALS323 Datasheet

SN54ALS323 Registers. Datasheet pdf. Equivalent

SN54ALS323 Datasheet
Recommendation SN54ALS323 Datasheet
Part SN54ALS323
Description 8-Bit Universal Shift/Storage Registers
Feature SN54ALS323; SN54ALS323, SN74ALS323 8ĆBIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH SYNCHRONOUS CLEAR AND 3ĆSTATE OU.
Manufacture etcTI
Datasheet
Download SN54ALS323 Datasheet




Texas Instruments SN54ALS323
SN54ALS323, SN74ALS323
8ĆBIT UNIVERSAL SHIFT/STORAGE REGISTERS
WITH SYNCHRONOUS CLEAR AND 3ĆSTATE OUTPUTS
SDAS267A − DECEMBER 1982 − REVISED DECEMBER 1994
Multiplexed I/O Ports Provide Improved Bit
Density
Four Modes of Operation:
− Hold (Store)
− Shift Right
− Shift Left
− Load Data
Operate With Outputs Enabled or at High
Impedance
3-State Outputs Drive Bus Lines Directly
Can Be Cascaded for n-Bit Word Lengths
Synchronous Clear
Applications:
− Stacked or Push-Down Registers
− Buffer Storage
− Accumulator Registers
Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), and Standard Plastic (N)
and Ceramic (J) 300-mil DIPs
description
These 8-bit universal shift /storage registers
feature multiplexed input/output (I/O) ports to
achieve full 8-bit data handling in a 20-pin
package. Two function-select (S0, S1) inputs and
two output-enable (OE1, OE2) inputs can be used
to choose the modes of operation listed in the
function table.
SN54ALS323 . . . J PACKAGE
SN74ALS323 . . . DW OR N PACKAGE
(TOP VIEW)
S0
OE1
OE2
G/QG
E/QE
C/QC
A/QA
QA
CLR
GND
1
2
3
4
5
6
7
8
9
10
20 VCC
19 S1
18 SL
17 QH
16 H/QH
15 F/QF
14 D/QD
13 B/QB
12 CLK
11 SR
SN54ALS323 . . . FK PACKAGE
(TOP VIEW)
G/QG
E/QE
C/QC
A/QA
QA
3 2 1 20 19
4 18
5 17
6 16
7 15
8 14
9 10 11 12 13
SL
QH
H/QH
F/QF
D/QD
Synchronous parallel loading is accomplished by taking both S0 and S1 high. This places the 3-state outputs
in the high-impedance state and permits data applied on the I/O ports to be clocked into the register. Reading
out of the register can be accomplished while the outputs are enabled in any mode. Clearing occurs
synchronously when the clear (CLR) input is low. Taking either OE1 or OE2 high disables the outputs but has
no effect on clearing, shifting, or storing data.
The SN54ALS323 is characterized for operation over the full military temperature range of −55°C to 125°C. The
SN74ALS323 is characterized for operation from 0°C to 70°C.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 1994, Texas Instruments Incorporated
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
1



Texas Instruments SN54ALS323
SN54ALS323, SN74ALS323
8ĆBIT UNIVERSAL SHIFT/STORAGE REGISTERS
WITH SYNCHRONOUS CLEAR AND 3ĆSTATE OUTPUTS
SDAS267A − DECEMBER 1982 − REVISED DECEMBER 1994
FUNCTION TABLE
INPUTS
I/O PORTS
OUTPUTS
MODE
CLR S1
S0
OE1† OE2† CLK SL
SR A/QA B/QB C/QC D/QD E/QE F/QF G/QG H/QH QA
QH
L XL
L
L XX L L L L L L L
L LL
Clear L L X
L
L XX L L L L L L L
L LL
L HH X X XX X X X X X X X X L L
Hold
H
H
LL
XX
Shift H L H
Right H L H
Shift H H L
Left H H L
Load H H H
L
L
L
L
L
L
X
L X X X QA0 QB0 QC0 QD0 QE0 QF0 QG0 QH0 QA0 QH0
L L X X QA0 QB0 QC0 QD0 QE0 QF0 QG0 QH0 QA0 QH0
L X H H QAn QBn QCn QDn QEn QFn QGn H QGn
L
XL
L QAn QBn QCn QDn QEn QFn QGn L QGn
L H X QBn QCn QDn QEn QFn QGn QHn H QBn H
L L X QBn QCn QDn QEn QFn QGn QHn L QBn L
X XX a b c d e f g h a h
NOTE: a . . . h = the level of the steady-state input at inputs A through H, respectively. This data is loaded into the flip-flops while the flip-flop outputs
are isolated from the I/O terminals.
When one or both output-enable inputs are high, the eight I/O terminals are disabled to the high-impedance state; however, sequential operation
or clearing of the register is not affected.
logic symbol
CLR
OE1
OE2
S0
S1
CLK
SR
A /QA
9
2
3
1
19
12
11
7
13
B/QB
C/QC
D/QD
E/QE
F/QF
G/QG
H/QH
6
14
5
15
4
16
18
SL
SRG8
4R
&
3EN13
00
M
13
C4/1/2
1,4D
3,4D
5, 13
3, 4D
6, 13
Z5
Z6
3, 4D
12, 13
2, 4D
Z12
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
8
QA
17
QH
2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443



Texas Instruments SN54ALS323
logic diagram (positive logic)
9
CLR
S0 1
SN54ALS323, SN74ALS323
8ĆBIT UNIVERSAL SHIFT/STORAGE REGISTERS
WITH SYNCHRONOUS CLEAR AND 3ĆSTATE OUTPUTS
SDAS267A − DECEMBER 1982 − REVISED DECEMBER 1994
19
S1
SR
(shift right
serial input)
11
12
CLK
QA8
1D
C1
Six
Identical
Channels
Not
Shown†
18
SL
(shift left
serial input)
1D
C1
17
QH
2
OE1
3
OE2
7
A/QA
† I/O ports not shown: B/QB (13), C/QC (6), D/QD (14), E/QE (5), F/QF (15), and G/QG (4).
16
H/QH
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, VI: All inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Operating free-air temperature range, TA: SN54ALS323 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C
SN74ALS323 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
3







@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)