Quadruple 2-Input Positive-OR Gates
SN54ALS32, SN54AS32, SN74ALS32, SN74AS32 QUADRUPLE 2-INPUT POSITIVE-OR GATES
• Package Options Include Plastic
Small-Ou...
Description
SN54ALS32, SN54AS32, SN74ALS32, SN74AS32 QUADRUPLE 2-INPUT POSITIVE-OR GATES
Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
description
These devices contain four independent 2-input positive-OR gates. They perform the Boolean functions Y = A B or Y = A + B in positive logic.
The SN54ALS32 and SN54AS32 are characterized for operation over the full military temperature range of – 55°C to 125°C. The SN74ALS32 and SN74AS32 are characterized for operation from 0°C to 70°C.
FUNCTION TABLE (each gate)
INPUTS AB
OUTPUT Y
HX
H
XH
H
LL
L
SDAS113B – APRIL 1982 – REVISED DECEMBER 1994
SN54ALS32, SN54AS32 . . . J PACKAGE SN74ALS32, SN74AS32 . . . D OR N PACKAGE
(TOP VIEW)
1A 1B 1Y 2A 2B 2Y GND
1 2 3 4 5 6 7
14 VCC 13 4B 12 4A 11 4Y 10 3B 9 3A 8 3Y
SN54ALS32, SN54AS32 . . . FK PACKAGE (TOP VIEW)
3 2 1 20 19
1Y 4
18 4A
NC 5
17 NC
2A 6
16 4Y
NC 7
15 NC
2B 8
14 3B
9 10 11 12 13
2Y 1B GND 1A
NC NC 3Y VCC 3A 4B
logic symbol†
1 1A
2 1B
4 2A
5 2B
9 3A
10 3B
12 4A
13 4B
≥1
3 1Y
6 2Y
8 3Y
11 4Y
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
NC – No internal connection
logic diagram (positive logic)
1 1A
2 1B
4 2A
5 2B
9 3A
10 3B
12 4A
13 4B
3 1Y
6 2Y
8 3Y
11 4Y
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of...
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