Architecture microcontroller. SPC574S64E3 Datasheet

SPC574S64E3 microcontroller. Datasheet pdf. Equivalent

Part SPC574S64E3
Description 32-bit Power Architecture microcontroller
Feature SPC574S60E3, SPC574S64E3 32-bit Power Architecture microcontroller for automotive ASILD application.
Manufacture STMicroelectronics
Datasheet
Download SPC574S64E3 Datasheet



SPC574S64E3
SPC574S60E3, SPC574S64E3
32-bit Power Architecture microcontroller for automotive ASILD
applications
Datasheet - production data
eTQFP100 (14 x 14 x 1.0 mm)
Features
AEC-Q100 qualified
High performance e200z4d dual core
– 32-bit Power Architecture technology CPU
– Core frequency as high as 140 MHz
– Dual issue 5-stage pipeline in-order
execution core
– Variable Length Encoding (VLE)
– Core MPU
– Floating Point, End-to-End Error Correction
– 8 KB instruction cache with error detection
code
– 32 KB local data RAM and 4 KB data cache
along with 8 KB instruction cache
1600 KB (1.5 MB code + 64 KB data) on-chip
flash memory: supports read during program
and erase operations, and multiple blocks
allowing EEPROM emulation
128 KB on-chip RAM (96 KB on chip
RAM + 32 KB local data RAM)
Multi-channel direct memory access controller
(eDMA) with 32 channels
Comprehensive new generation ASILD safety
concept
– ASILD SEooC approach (Safety Element
out of Context)
– FCCU for collection and reaction to failure
notifications
– Memory Error Management Unit (MEMU)
for collection and reporting of error events
in memories
– End-to-end Error Correction Code
(e2eECC) logic
– Cyclic redundancy check (CRC) unit
8 enhanced 12-bit SAR analog converters
– 2 sets of: 3 ADCs and one supervisor ADC
– 1.5 µs conversion time at 12 MHz
– Up to 32 physical channels
– Dual Programmable CTU
4 general purpose eTimer units (6 channels
each)
4 FlexPWM units
– 2 (4 channels each) used for motor control
with hardware synchronization between the
control systems
– 2 (2 channels each) used for SWG
emulation
Communication interfaces
– 4 LINFlexD modules
– 4 deserial serial peripheral interface (DSPI)
modules
– 2 MCAN interfaces with advanced shared
memory scheme (808 x 32-bit words for
MCAN0 and 520 x 32-bit words for
MCAN1) and CAN-FD support
– 1 FlexRay module with 2 channels, 128
message buffers
– 2 SENT interfaces (3 channels each)
Dual phase-locked loops with stable clock
domain for peripherals and FM modulation
domain for computational shell
Nexus Class 3 debug and trace interface
On-chip CAN/UART Bootstrap loader with
BAF. Physical Interface (PHY) can be UART
Advanced and flexible supply scheme
– On-chip voltage regulator for 1.2 V core
logic supply. Bypass mode supported for
external 1.2 V core logic supply
– 3.3 V or 5 V IO and ADC supply (2
independent power domains available)
Junction temperature range -40 °C to 150 °C
February 2020
This is information on a product in full production.
DS10601 Rev 6
1/77
www.st.com



SPC574S64E3
Contents
Contents
SPC574Sx
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.1 Document overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.3 Feature overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.4 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2 Package pinouts and signal descriptions . . . . . . . . . . . . . . . . . . . . . . . 13
2.1 Package pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.2 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.3 Package pads/pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.2 Parameter classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.3 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.4 Electromagnetic compatibility (EMC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.5 Electrostatic discharge (ESD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.6 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.7 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.7.1 Package thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.7.2 Power considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.8 Current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
3.9 I/O pad electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.9.1 I/O pad types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.9.2 I/O input DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.9.3 I/O output DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
3.10 RESET electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
3.11 Power management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
3.11.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
3.11.2 Voltage regulator electrical characteristics . . . . . . . . . . . . . . . . . . . . . . 39
3.11.3 Power Schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
3.11.4 Decoupling capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
2/77 DS10601 Rev 6





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