Mixed-Signal Microcontrollers. MSP430CG4617 Datasheet

MSP430CG4617 Microcontrollers. Datasheet pdf. Equivalent

Part MSP430CG4617
Description Mixed-Signal Microcontrollers
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MSP430CG4617
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Design
MSP430FG4619, MSP430FG4618, MSP430FG4617, MSP430FG4616
MSP430CG4619, MSP430CG4618, MSP430CG4617, MSP430CG4616
SLAS508K – APRIL 2006 – REVISED MAY 2020
MSP430FG461x, MSP430CG461x Mixed-Signal Microcontrollers
1 Device Overview
1.1 Features
1
• Low supply-voltage range: 1.8 V to 3.6 V
• Ultra-low power consumption
– Active mode: 400 µA at 1 MHz, 2.2 V
– Standby mode: 1.3 µA
– Off mode (RAM retention): 0.22 µA
• Five power-saving modes
• Wakeup from standby mode in less than 6 µs
• 16-bit RISC architecture, extended memory,
125ns instruction cycle time
• Three-channel internal DMA
• 12-bit analog-to-digital converter (ADC) with
internal reference, sample-and-hold and autoscan
feature
• Three configurable operational amplifiers
• Dual 12-bit digital-to-analog converters (DACs)
with synchronization
• 16-bit Timer_A with three capture/compare
registers
• 16-bit Timer_B with seven capture/compare-with-
shadow registers
• On-chip comparator
• Supply voltage supervisor and monitor with
programmable level detection
• Serial communication interface (USART1), select
asynchronous UART or synchronous SPI by
software
• Universal serial communication interface
– Enhanced UART supports automatic baud-rate
detection
– IrDA encoder and decoder
– Synchronous SPI
– I2C
• Serial onboard programming, programmable code
protection by security fuse
• Brownout detector
• Basic timer with real-time clock (RTC) feature
• Integrated LCD driver up to 160 segments with
regulated charge pump
Device Comparison summarizes the available
family members
– MSP430FG4616, MSP430FG4616,
92KB+256B of flash or ROM,
4KB of RAM
– MSP430FG4617, MSP430CG4617,
92KB+256B of flash or ROM,
8KB of RAM
– MSP430FG4618, MSP430CG4618,
116KB+256B of flash or ROM,
8KB of RAM
– MSP430FG4619, MSP430CG4619,
120KB+256B of flash or ROM,
4KB of RAM
1.2 Applications
• Portable medical applications
• E-meter applications
1.3 Description
The TI MSP430™ family of ultra-low-power microcontrollers consists of several devices featuring different
sets of peripherals targeted for various applications. The architecture, combined with five low-power
modes, is optimized to achieve extended battery life in portable measurement applications. The device
features a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to
maximum code efficiency. The digitally controlled oscillator (DCO) allows the device to wake up from low-
power modes to active mode in less than 6 µs.
The MSP430xG461x series are microcontroller configurations with two 16-bit timers, a high-performance
12-bit ADC, dual 12-bit DACs, three configurable operational amplifiers, one universal serial
communication interface (USCI), one universal synchronous/asynchronous communication interface
(USART), DMA, 80 I/O pins, and a segment liquid crystal display (LCD) driver with regulated charge
pump.
For complete module descriptions, see the MSP430x4xx Family User’s Guide.
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.



MSP430CG4617
MSP430FG4619, MSP430FG4618, MSP430FG4617, MSP430FG4616
MSP430CG4619, MSP430CG4618, MSP430CG4617, MSP430CG4616
SLAS508K – APRIL 2006 – REVISED MAY 2020
www.ti.com
PART NUMBER
MSP430FG4619IPZ
MSP430FG4619IZCA
MSP430FG4619IZQW (3)
Device Information(1)
PACKAGE
LQFP (100)
nFBGA (113)
MicroStar Junior™ BGA (113)
BODY SIZE(2)
14 mm × 14 mm
7 mm × 7 mm
7 mm × 7 mm
(1) For the most current part, package, and ordering information for all available devices, see the Package
Option Addendum in Section 8, or see the TI website at www.ti.com.
(2) The sizes shown here are approximations. For the package dimensions with tolerances, see the
Mechanical Data in Section 8.
(3) All orderable part numbers in the ZQW (MicroStar Junior BGA) package have been changed to a
status of Last Time Buy. Visit the Product life cycle page for details on this status.
1.4 Functional Block Diagram
Figure 1-1 shows the functional block diagram.
XIN / XOUT/
XT2 IN XT2 OUT
22
DVCC 1 /2 DVSS1 /2
AVCC
AVSS
P1. x/P2.x
2x8
P3. x/P4.x
P5. x/P6.x
4 x8
P 7.x/ P8. x
P 9.x/P 10.x
4 x8/2 x16
Oscillators
FLL +
MCLK
ACLK
Flash (FG)
ROM (CG)
SMCLK
120KB
116KB
92KB
92KB
8MHz
CPUX
incl. 16
Registers
MAB
MDB
RAM
4KB
8KB
8KB
4KB
ADC 12
12-Bit
12
Channels
DAC 12
12-Bit
2 Channels
Voltage out
OA0, OA 1,
OA 2
3 Op Amps
Comparator
_A
Ports
P1/P2
2x8 I/O
Interrupt
capability
Ports
P3/P4
P5/P6
4x8 I/O
Ports
P7/P8
P9/P10
4x8, 2x16 I/O
DMA
Controller
3 Channels
Enhanced
Emulation
(FG only )
JTAG
Interface
Brownout
Protection
SVS/ SVM
Hardware
Multiplier
MPY,
MPYS,
MAC,
MACS
Watchdog
WDT+
15/16-Bit
Timer _ A3
3 CC
Registers
Timer_B 7
7 CC
Registers,
Shadow
Reg
Basic Timer
and
Real-Time
Clock
LCD _A
160
Segments
1, 2,3,4 Mux
USCI_A 0:
UART,
IrDA, SPI
USCI_B 0:
SPI, I2 C
USART 1
UART , SPI
RST /NMI
Figure 1-1. Functional Block Diagram
2 Device Overview
Copyright © 2006–2020, Texas Instruments Incorporated
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MSP430CG4618 MSP430CG4617 MSP430CG4616





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