Termination Regulator. BD3539FVM Datasheet

BD3539FVM Regulator. Datasheet pdf. Equivalent

BD3539FVM Datasheet
Recommendation BD3539FVM Datasheet
Part BD3539FVM
Description Termination Regulator
Feature BD3539FVM; Datasheet 1.0V to 5.5V, 1A 1ch Termination Regulators for DDR-SDRAMs BD3539FVM BD3539NUX General D.
Manufacture ROHM
Datasheet
Download BD3539FVM Datasheet




ROHM BD3539FVM
Datasheet
1.0V to 5.5V, 1A 1ch
Termination Regulators for DDR-SDRAMs
BD3539FVM BD3539NUX
General Description
BD3539 is a termination regulator that complies with
JEDEC requirements for DDR1-SDRAM,
DDR2-SDRAM, and DDR3-SDRAM. This linear power
supply uses a built-in N-channel MOSFET and
high-speed OP-AMPS specially designed to provide
excellent transient response. It has a sink/source
current capability of up to 1A and has a power supply
bias requirement of 3.3 V (for DDR2 and DDR3) and 5.0
V (for DDR1, DDR2, and DDR3) for driving the
N-channel MOSFET. By employing an independent
reference voltage input (VDDQ) and a feedback pin
(VTTS), this termination regulator provides excellent
output voltage accuracy and load regulation as required
by JEDEC standards. Additionally, BD3539 has a
reference power supply output (VREF)for DDR-SDRAM
or for memory controllers. Unlike the VTT output that
goes to “Hi-Z” state, the VREF output is kept
unchanged when EN input is changed to “Low”, making
this IC suitable for DDR-SDRAM under “Self Refresh”
state.
Features
Incorporates a Push-Pull Power Supply for
Termination (VTT)
Incorporates a Reference Voltage Circuit (VREF)
Incorporates an Enabler
Incorporates an Under Voltage Lockout (UVLO)
Incorporates a Thermal Shutdown Protector (TSD)
Compatible with Dual Channel (DDR1, DDR2,
DDR3)
Usable Ceramic Capacitor at Output
Applications
Power Supply for DDR 1/2/3 - SDRAM
Key Specifications
Termination Input Voltage Range:
1.0V to 5.5V
VCC Input Voltage Range:
2.7V to 5.5V
VDDQ Reference Voltage Range: 1.0V to 2.75V
Output Voltage:
1/2xVDDQ V(Typ)
Output Current:
1.0A (Max)
High side FET ON-Resistance:
0.35(Typ)
Low side FET ON-Resistance:
0.35(Typ)
Standby Current:
0.5mA (Typ)
Operating Temperature Range: -30°C to +100°C
Packages
W(Typ) x D(Typ) x H(Max)
MSOP8
2.90mm x 4.00mm x 0.90mm
VSON008X2030
2.00mm x 3.00mm x 0.60mm
Typical Application Circuit, Block Diagram
VCC
C2
VDDQ
VTT_IN
C3
VCC
6
VDDQ
5
VTT_IN
7
VCC
VCC
Reference
Block
UVLO
Enable EN
2
Thermal TSD
Protection
EN
1
GND
SOFT
TSD
EN
UVLO
VCC
TSD
VCC
EN
UVLO
TSD
EN
UVLO
UVLO
VTT
8
C4
3
VTTS
4
VREF
C1
VTT
½x
VDDQ
Product structureSilicon monolithic integrated circuit
www.rohm.com
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ2211114001
This product has no designed protection against radioactive rays
1/18
TSZ02201-0J2J0A900710-1-2
22.Jul.2015 Rev.002



ROHM BD3539FVM
BD3539FVM BD3539NUX
Pin Configurations
FVM
TOP VIEW
GND 1
EN 2
VTTS 3
VREF 4
8 VTT
7 VTT_IN
6 VCC
5 VDDQ
NUX
VTT_IN 1
VTT 2
GND 3
EN 4
TOP VIEW
8 VCC
7 VDDQ
6 VREF
5 VTTS
Datasheet
Pin Descriptions
Pin
No.
Pin Name
Pin Function
1
GND
Ground pin
2 EN Enable input pin
3 VTTS Detector pin for termination voltage
4 VREF Reference voltage output pin
5 VDDQ Reference voltage input pin
6
VCC
VCC pin
7 VTT_IN Termination input pin
8 VTT Termination output pin
Pin
No.
1
2
3
4
5
6
7
8
Bottom
Pin Name
VTT_IN
VTT
GND
EN
VTTS
VREF
VDDQ
VCC
FIN
Pin Function
Termination input pin
Termination output pin
Ground pin
Enable input pin
Detector pin for termination voltage
Reference voltage output pin
Reference voltage input pin
VCC pin
Substrate (connected to GND)
Description of Blocks
1. VCC
The VCC pin is for the independent power supply input that operates the internal circuit of the IC. It is the voltage at this
pin that drives the IC’s amplifier circuits. The VCC input ranges from 2.7V to 5.5V and maximum current consumption is
4mA. A bypass capacitor of 1μF or so should be connected to this pin when using the IC in an application circuit.
2. VDDQ
This is the power supply input pin for an internal voltage divider network. The voltage at VDDQ is halved by two 100k
internal voltage-divider resistors and the resulting voltage serves as reference for the VTT output. Since VREF=VTT =
1/2VDDQ, the JEDEC requirement for DDR-SDRAM can be satisfied by supplying the correct voltage to VDDQ.
Noise input should be avoided at the VDDQ pin as it is also included by the voltage-divider at the output. An RC filter
consisting of a resistor and a capacitor (220and 2.2μF, for instance,) may be used to reduce the noise input but make
sure that it will not significantly affect the voltage-divider’s output. the IC.
3. VTT_IN
VTT_IN is the power supply input pin for the VTT output. Input voltage may range from 1.0V to 5.5V, but consideration
must be given to the current limit dictated by the ON-Resistance of the IC and to the change in allowable loss due to
input/output voltage difference.
Generally, the following voltages are supplied:
DDR3 VTT_IN = 1.5V
DDR2 VTT_IN = 1.8V
DDR1 VTT_IN = 2.5V
Take note that a high-impedance voltage input at VTT_IN may result in oscillation or degradation in ripple rejection, so
connecting a 10µF capacitor with minimal change in capacitance to VTT_IN terminal is recommended. However, this
impedance may depend on the characteristics of the power supply input and the impedance of the PC board wiring,
which must be carefully checked before use.
www.rohm.com
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
2/18
TSZ02201-0J2J0A900710-1-2
22.Jul.2015 Rev.002



ROHM BD3539FVM
BD3539FVM BD3539NUX
Datasheet
Description of Blocks – continued
4. VREF
BD3539 provides a constant voltage, VREF, which is independent from the VTT output and can serve as reference input
for memory controllers and DRAMs. The voltage level of VREF is kept constant even if the EN pin is at “Low” level,
making the use of this IC compatible with the “Self Refresh” state of DRAMs.
In order to stabilize the output voltage, connecting the correct combination of capacitor and resistor to VREF is necessary.
For this purpose, a 1.0μF to 2.2μF ceramic capacitor, characterized by minimal variation in capacitance, is recommended.
The maximum current capability of the VREF pin is 25mA, but for an application which consumes a small amount of
VREF current (1mA or less), using a capacitance of 0.1μF or less will do.
5. VTTS
VTTS is a sense pin for the load regulation of the VTT output voltage. In case the wire connecting VTT pin and the load
is too long, connecting VTTS pin to the part of the wire nearer to the load may improve load regulation.
VTTS terminal is High impedance terminal. Therefore it is easy to be affected by the noise. The stable operation of the IC
is possible by inserting RC filter (e.g.,: R=200, C=1000pF) near VTTS terminal.
6. VTT
This is the output pin for the DDR memory termination voltage and it has a sink/source current capability of ±1.0A. VTT
voltage tracks the voltage at VDDQ pin divided in half. The output is turned OFF when EN pin is “Low” or when either the
VCC UVLO or the thermal shutdown protection function is activated.
Always connect a capacitor to VTT pin for loop gain and phase compensation and for reduction in output voltage variation
in the event of sudden load change. Be careful in choosing the capacitor as insufficient capacitance may cause oscillation
and high ESR (Equivalent Series Resistance) may result in increased output voltage variation during a sudden change in
load. A 10µF or so ceramic capacitor is recommended, though ambient temperature and other conditions should also be
considered.
7. EN
A “High” input of 2.3V or higher to EN turns ON the VTT output. A “Low” input of 0.8V or less, on the other hand, turns
VTT to a Hi-Z state. With a “Low” EN input, however, the VREF output remains ON, provided that sufficient VCC and
VDDQ voltages have been established.
When EN terminal repeats ON/OFF, an inrush current may flow in VTT_IN terminal. Please be careful about voltage Drop
of the VTT_IN line.
Absolute Maximum Ratings
Parameter
Input Voltage
Enable Input Voltage
Termination Input Voltage
VDDQ Reference Voltage
Output Current
Power Dissipation1
Power Dissipation2
Power Dissipation3
Symbol
VCC
VEN
VTT_IN
VDDQ
ITT
Pd1
Pd2
Pd3
BD3539FVM
0.38 (Note 2)
0.58 (Note 3)
-
Limit
7 (Note 1)
7 (Note 1)
7 (Note 1)
7 (Note 1)
1
BD3539NUX
0.24 (Note 4)
0.51 (Note 5)
0.87 (Note 6)
Unit
V
V
V
V
A
W
W
W
Operating Temperature Range
Topr
-30 to +100
°C
Storage Temperature Range
Tstg
-55 to +150
°C
Maximum Junction Temperature
Tjmax
+150
°C
(Note 1) Should not exceed Pd. Instantaneous surge voltage, back electromotive force and voltage under less than 10% duty cycle.
(Note 2) For Ta25°C (With no heat sink) θja=322.6°C /W
(Note 3) For Ta25°C when mounting a 70mm x 70mm x 1.6mm glass-epoxy substrate, with no heat sink θja=212.8°C /W
(Note 4) For Ta25°C (With no heat sink) θja=516.5°C /W
(Note 5) For Ta25°C when mounting a 70mm x 70mm x 1.6mm glass-epoxy substrate 1-layer board, θja=242.7°C /W
(Note 6) For Ta25°C when mounting a 70mm x 70mm x 1.6mm glass-epoxy substrate 4-layer board (copper foil density: 5505mm2 (copper foil area in each
layer)), θja=142.5°C /W
Caution: Operating the IC over the absolute maximum ratings may damage the IC. In addition, it is impossible to predict all destructive situations such as
short-circuit modes, open circuit modes, etc. Therefore, it is important to consider circuit protection measures, like adding a fuse, in case the IC is operated in a
special mode exceeding the absolute maximum ratings.
www.rohm.com
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
3/18
TSZ02201-0J2J0A900710-1-2
22.Jul.2015 Rev.002







@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)