REGISTERED TRANSCEIVERS. CY54FCT543T Datasheet

CY54FCT543T TRANSCEIVERS. Datasheet pdf. Equivalent

CY54FCT543T Datasheet
Recommendation CY54FCT543T Datasheet
Part CY54FCT543T
Description 8-BIT LATCHED REGISTERED TRANSCEIVERS
Feature CY54FCT543T; D Function, Pinout, and Drive Compatible With FCT and F Logic D Reduced VOH (Typically = 3.3 V) Vers.
Manufacture etcTI
Datasheet
Download CY54FCT543T Datasheet




Texas Instruments CY54FCT543T
D Function, Pinout, and Drive Compatible
With FCT and F Logic
D Reduced VOH (Typically = 3.3 V) Versions
of Equivalent FCT Functions
D Edge-Rate Control Circuitry for
Significantly Improved Noise
Characteristics
D Ioff Supports Partial-Power-Down Mode
Operation
D Matched Rise and Fall Times
D Fully Compatible With TTL Input and
Output Logic Levels
D 3-State Outputs
D ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
D Separation Controls for Data Flow in Each
Direction
D Back-to-Back Latches for Storage
D CY54FCT543T
– 48-mA Output Sink Current
– 12-mA Output Source Current
D CY74FCT543T
– 64-mA Output Sink Current
– 32-mA Output Source Current
CY54FCT543T, CY74FCT543T
8-BIT LATCHED REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCCS030A – MAY 1994 – REVISED OCTOBER 2001
CY54FCT543T . . . D PACKAGE
CY74FCT543T . . . Q OR SO PACKAGE
(TOP VIEW)
LEBA
OEBA
A0
A1
A2
A3
A4
A5
A6
A7
CEAB
GND
1
2
3
4
5
6
7
8
9
10
11
12
24 VCC
23 CEBA
22 B0
21 B1
20 B2
19 B3
18 B4
17 B5
16 B6
15 B7
14 LEAB
13 OEAB
description
The ’FCT543T octal latched transceivers contain two sets of eight D-type latches with separate latch-enable
(LEAB, LEBA) and output-enable (OEAB, OEBA) inputs for each set to permit independent control of input and
output in either direction of data flow. For data flow from A to B, for example, the A-to-B enable (CEAB) input
must be low in order to enter data from A or to take data from B, as indicated in the function table. With CEAB
low, a low signal on the A-to-B latch-enable (LEAB) input makes the A-to-B latches transparent; a subsequent
low-to-high transition of the LEAB signal puts the A latches in the storage mode and their outputs no longer
change with the A inputs. With CEAB and OEAB low, the 3-state B-output buffers are active and reflect the data
present at the output of the A latches. Control of data from B to A is similar, but uses CEBA, LEBA, and OEBA
inputs.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow through the device when it is powered down.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 2001, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
1



Texas Instruments CY54FCT543T
CY54FCT543T, CY74FCT543T
8-BIT LATCHED REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCCS030A MAY 1994 REVISED OCTOBER 2001
NAME
OEAB
OEBA
CEAB
CEBA
LEAB
LEBA
A
B
PIN DESCRIPTION
DESCRIPTION
A-to-B output-enable input (active low)
B-to-A output-enable input (active low)
A-to-B enable input (active low)
B-to-A enable input (active low)
A-to-B latch-enable input (active low)
B-to-A latch-enable input (active low)
A-to-B data inputs or B-to-A 3-state outputs
B-to-A data inputs or A-to-B 3-state outputs
ORDERING INFORMATION
TA
PACKAGE
SPEED
(ns)
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
QSOP Q Tape and reel
5.3 CY74FCT543CTQCT FCT543C
SOIC SO
Tube
Tape and reel
5.3 CY74FCT543CTSOC
FCT543C
5.3 CY74FCT543CTSOCT
40°C to 85°C
QSOP Q
SOIC SO
Tape and reel
Tube
Tape and reel
6.5 CY74FCT543ATQCT FCT543A
6.5 CY74FCT543ATSOC
FCT543A
6.5 CY74FCT543ATSOCT
QSOP Q Tape and reel
8.5 CY74FCT543TQCT
FCT543
SOIC SO
Tube
Tape and reel
8.5 CY74FCT543TSOC
FCT543
8.5 CY74FCT543TSOCT
55°C to 125°C CDIP D
Tube
Tube
10 CY54FCT543TDMB
10 CY54FCT543TLMB
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
INPUTS
CEAB LEAB OEAB
LATCH
A TO B§
OUTPUT
B
H X X Storing
Z
X H X Storing
X
XXH
X
Z
L L L Transparent Current A inputs
L
H
L
Storing
Previous A inputs
H = High logic level, L = Low logic level, X = Dont care,
Z = High-impedance state
A-to-B data flow shown; B-to-A flow control is the same, except uses
CEBA, LEBA, and OEBA.
§ Before LEAB low-to-high transition
2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265



Texas Instruments CY54FCT543T
logic diagram (positive logic)
2
OEBA
CEBA 23
LEBA 1
OEAB 13
11
CEAB
14
LEAB
3
A0
CY54FCT543T, CY74FCT543T
8-BIT LATCHED REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCCS030A MAY 1994 REVISED OCTOBER 2001
LE
Q
D
LE
Q
D
22
B0
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range to ground potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V
DC input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V
DC output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V
DC output current (maximum sink current/pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 mA
Package thermal impedance, θJA (see Note 1): Q package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61°C/W
SO package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46°C/W
Ambient temperature range with power applied, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 135°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under absolute maximum ratingsmay cause permanent damage to the device. These are stress ratings only, and
functionaloperation of the device at these or any other conditions beyond those indicated under recommended operating conditionsis not implied.
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 2)
CY54FCT543T
MIN NOM MAX
VCC Supply voltage
4.5 5 5.5
VIH High-level input voltage
2
VIL Low-level input voltage
0.8
IOH High-level output current
12
IOL Low-level output current
48
TA Operating free-air temperature
55 125
NOTE 2: All unused inputs of the device must be held at VCC or GND to ensure proper device operation.
CY74FCT543T
MIN NOM MAX
4.75 5 5.25
2
0.8
32
64
40 85
UNIT
V
V
V
mA
mA
°C
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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