CY54FCT543T

D Function, Pinout, and Drive Compatible With FCT and F Logic D Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions D Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics D Ioff Supports Partial-Power-Down Mode Operation D Matched Rise and Fall Times D Fully Compatible With TTL Input and Output Logic Levels D 3-State Outputs D ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) D Separation Controls for Data Flow in Each Direction D Back-to-Back Latches for Storage D CY54FCT543T – 48-mA Output Sink Current – 12-mA Output Source Current D CY74FCT543T – 64-mA Output Sink Current – 32-mA Output Source Current CY54FCT543T, CY74FCT543T 8-BIT LATCHED REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS SCCS030A – MAY 1994 – REVISED OCTOBER 2001 CY54FCT543T . . . D PACKAGE CY74FCT543T . . . Q OR SO PACKAGE (TOP VIEW) LEBA OEBA A0 A1 A2 A3 A4 A5 A6 A7 CEAB GND 1 2 3 4 5 6 7 8 9 10 11 12 24 VCC 23 CEBA 22 B0 21 B1 20 B2 19 B3 18 B4 17 B5 16 B6 15 B7 14 LEAB 13 OEAB description The ’FCT543T octal latched transceivers contain two sets of eight D-type latches with separate latch-enable (LEAB, LEBA) and output-enable (OEAB, OEBA) inputs for each set to permit independent control of input and output in either direction of data flow. For data flow from A to B, for example, the A-to-B enable (CEAB) input must be low in order to enter data from A or to take data from B, as i...