8-BIT LATCHES
D Function and Pinout Compatible With FCT
and F Logic
D Reduced VOH (Typically = 3.3 V) Versions
of Equivalent FCT Funct...
Description
D Function and Pinout Compatible With FCT
and F Logic
D Reduced VOH (Typically = 3.3 V) Versions
of Equivalent FCT Functions
D Edge-Rate Control Circuitry for
Significantly Improved Noise
Characteristics
D Ioff Supports Partial-Power-Down Mode
Operation
D ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
D Matched Rise and Fall Times D Fully Compatible With TTL Input and
Output Logic Levels
D 3-State Outputs D CY54FCT573T
– 32-mA Output Sink Current
– 12-mA Output Source Current
D CY74FCT573T
– 64-mA Output Sink Current
– 32-mA Output Source Current
CY54FCT573T, CY74FCT573T 8-BIT LATCHES
WITH 3-STATE OUTPUTS
SCCS068 – OCTOBER 2001
CY54FCT573T . . . D PACKAGE CY74FCT573T . . . P, Q, OR SO PACKAGE
(TOP VIEW)
OE
D0 D1 D2 D3 D4 D5 D6 D7 GND
1 2 3 4 5 6 7 8 9 10
20 VCC 19 O0 18 O1 17 O2 16 O3 15 O4 14 O5 13 O6 12 O7 11 LE
description
The ’FCT573T devices consist of eight latches with 3-state outputs for bus-organized applications. When the latch-enable (LE) input is high, the flip-flops appear transparent to the data. Data that meets the required setup times are latched when LE transitions from high to low. Data appears on the bus when the output-enable (OE) input is low. When OE is high, the bus output is in the high-impedance state. In this mode, data can be entered into the latches. The ’FCT573T devices are identical to the ’FCT373T devices, except for the flow-through pinout of the ’FCT573...
Similar Datasheet