CY74FCT191T

CY74FCT191T 4-BIT UP/DOWN BINARY COUNTER D Function, Pinout, and Drive Compatible With FCT and F Logic D Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions D Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics D Ioff Supports Partial-Power-Down Mode Operation D ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) D Matched Rise and Fall Times D 64-mA Output Sink Current 32-mA Output Source Current SCCS016A – MAY 1994 – REVISED SEPTEMBER 2001 Q OR SO PACKAGE (TOP VIEW) P1 Q1 Q0 CE U/D Q2 Q3 GND 1 2 3 4 5 6 7 8 16 VCC 15 P0 14 CP 13 RC 12 TC 11 PL 10 P2 9 P3 description The CY74FCT191T is a reversible modulo-16 binary counter, featuring synchronous counting and asynchronous presetting. The preset allows the CY74FCT191T to be used in programmable dividers. The count enable input, terminal count output, and ripple-clock output make possible a variety of methods of implementing multiusage counters. In the counting modes, state changes are initiated by the rising edge of the clock. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. NAME CE CP P PL U/D Q RC TC PIN DESCRIPTION DESCRIPTION Count enable input (active low) Clock pulse input (active rising edge) Parallel data inputs Asynchronous parallel load i...