Ultralow-Power ADC. ADS4222 Datasheet

ADS4222 ADC. Datasheet pdf. Equivalent

ADS4222 Datasheet
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Part ADS4222
Description Ultralow-Power ADC
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Texas Instruments ADS4222
Product
Folder
Sample &
Buy
Technical
Documents
Tools &
Software
Support &
Community
ADS4222, ADS4225, ADS4226
ADS4242, ADS4245, ADS4246
SBAS533D – MARCH 2011 – REVISED DECEMBER 2015
ADS42xx Dual-Channel, 14-/12-Bit, 160/125/65 MSPS Ultralow-Power ADC
1 Features
1 Ultralow Power With Single 1.8-V Supply, CMOS
Output:
– 183 mW Total Power at 65 MSPS
– 277 mW Total Power at 125 MSPS
– 332 mW Total Power at 160 MSPS
• High Dynamic Performance:
– 88-dBc SFDR at 170 MHz
– 71.4-dBFS SNR at 170 MHz
• Crosstalk: > 90 dB at 185 MHz
• Programmable Gain up to 6 dB for SNR/SFDR
Trade-off
• DC Offset Correction
• Output Interface Options:
– 1.8-V parallel CMOS Interface
– Double Data Rate (DDR) LVDS With
Programmable swing:
– Standard Swing: 350 mV
– Low Swing: 200 mV
• Supports Low Input Clock Amplitude Down to 200
mVPP
• Package: VQFN-64 (9.00 mm × 9.00 mm)
2 Applications
• Wireless Communications Infrastructure
• Software-Defined Radio
• Power Amplifier Linearization
3 Description
The ADS424x and ADS422x family of devices are
low-speed variants of the ADS42xx ultralow-power
family of dual-channel, 14-bit/12-bit analog-to-digital
converters (ADCs). Innovative design techniques are
used to achieve high-dynamic performance, while
consuming extremely low power with 1.8-V supply.
This topology makes the ADS424x/422x well-suited
for multi-carrier, wide-bandwidth communications
applications.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
ADS4222
ADS4225
ADS4226
ADS4242
VQFN (48)
9.00 mm × 9.00 mm
ADS4245
ADS4246
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
INP_A
INM_A
CLKP
CLKM
INP_B
INM_B
VCM
ADS4222/25/26/42/45/46 Block Diagram
AVDD AGND
DRVDD DRGND
LVDS Interface
Sampling
Circuit
14-Bit
ADC
Digital and
DDR
Serializer
CLOCKGEN
Output
Clock Buffer
Sampling
Circuit
14-Bit
ADC
Digital and
DDR
Serializer
ADS424x
Reference
Control
Interface
DA0P
DA0M
DA2P
DA2M
DA4P
DA4M
DA6P
DA6M
DA8P
DA8M
DA10P
DA10M
DA12P
DA12M
CLKOUTP
CLKOUTM
DB0P
DB0M
DB2P
DB2M
DB4P
DB4M
DB6P
DB6M
DB8P
DB8M
DB10P
DB10M
DB12P
DB12M
SDOUT
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.



Texas Instruments ADS4222
ADS4222, ADS4225, ADS4226
ADS4242, ADS4245, ADS4246
SBAS533D – MARCH 2011 – REVISED DECEMBER 2015
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Description (continued)......................................... 3
6 ADS424x/422x Family Comparison...................... 4
7 Pin Configuration and Functions ......................... 5
8 Specifications....................................................... 10
8.1 Absolute Maximum Ratings .................................... 10
8.2 ESD Ratings............................................................ 10
8.3 Recommended Operating Conditions..................... 11
8.4 Thermal Information ................................................ 11
8.5 Electrical Characteristics: ADS4246, ADS4245,
ADS4242.................................................................. 12
8.6 Electrical Characteristics: ADS4226, ADS4225,
ADS4222.................................................................. 15
8.7 Electrical Characteristics: General .......................... 18
8.8 Digital Characteristics ............................................. 19
8.9 Timing Requirements: LVDS and CMOS Modes.... 19
8.10 Serial Interface Timing Characteristics ................. 20
8.11 Reset Timing (Only When Serial Interface Is
Used)........................................................................ 20
8.12 Typical Characteristics .......................................... 25
9 Detailed Description ............................................ 49
9.1 Overview ................................................................. 49
9.2 Functional Block Diagrams ..................................... 49
9.3 Feature Description................................................. 51
9.4 Device Functional Modes........................................ 57
9.5 Programming........................................................... 58
9.6 Register Maps ......................................................... 67
10 Application and Implementation........................ 79
10.1 Application Information.......................................... 79
10.2 Typical Application ............................................... 80
11 Power Supply Recommendations ..................... 83
11.1 Sharing DRVDD and AVDD Supplies ................... 83
11.2 Using DC/DC Power Supplies .............................. 83
11.3 Power Supply Bypassing ...................................... 83
12 Layout................................................................... 83
12.1 Layout Guidelines ................................................. 83
12.2 Layout Example .................................................... 84
13 Device and Documentation Support ................. 85
13.1 Device Support .................................................... 85
13.2 Documentation Support ....................................... 86
13.3 Related Links ........................................................ 87
13.4 Community Resources.......................................... 87
13.5 Trademarks ........................................................... 87
13.6 Electrostatic Discharge Caution ............................ 87
13.7 Glossary ................................................................ 87
14 Mechanical, Packaging, and Orderable
Information ........................................................... 87
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (March 2011) to Revision D
Page
• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................ 1
Changes from Revision B (May 2011) to Revision C
Page
• Changed device status from Mixed Status to Production Data.............................................................................................. 1
• Changed 125MSPS sub-bullet of first Features bullet ........................................................................................................... 1
• Changed sub-bullets of second Features bullet ..................................................................................................................... 1
• Changed description of pin 64 in Pin Descriptions: LVDS Mode table .................................................................................. 7
• Changed description of pin 64 in Pin Descriptions: CMOS Mode table............................................................................... 10
• Changed ADS4246 fIN = 170 MHz Worst spur typical spcification in the ADS4246/ADS4245/ADS4242 Electrical
Characteristics table ............................................................................................................................................................. 14
• Added ADS4225/ADS4222 fIN = 70 MHz SNR, SINAD, SFDR, THD, HD2, HD3, and Worst spur minimum and
typical spcifications in the ADS4226/ADS4225/ADS4222 Electrical Characteristics table .................................................. 15
• Added ADS4225/ADS4222 DNL minimum and maximum spcifications in the ADS4226/ADS4225/ADS4222
Electrical Characteristics table ............................................................................................................................................. 17
• Added ADS4225/ADS4222 INL maximum spcifications in the ADS4226/ADS4225/ADS4222 Electrical
Characteristics table ............................................................................................................................................................. 17
• Changed ADS4242/ADS4222 Power Supply, Digital power LVDS interface typical specification in Electrical
Characteristics: General table .............................................................................................................................................. 18
2 Submit Documentation Feedback
Copyright © 2011–2015, Texas Instruments Incorporated
Product Folder Links: ADS4222 ADS4225 ADS4226 ADS4242 ADS4245 ADS4246



Texas Instruments ADS4222
www.ti.com
ADS4222, ADS4225, ADS4226
ADS4242, ADS4245, ADS4246
SBAS533D – MARCH 2011 – REVISED DECEMBER 2015
• Changed ADS4245/ADS4225 Power Supply, Digital power CMOS interface typical specification in Electrical
Characteristics: General table .............................................................................................................................................. 18
• Moved High-Performance Modes into separate table .......................................................................................................... 21
• Changed description of READOUT disabled in Serial Register Readout section................................................................ 60
• Updated Figure 152.............................................................................................................................................................. 61
• Changed READOUT desciption in Register Address 00h section ....................................................................................... 68
• Changed CLKOUT FALL POSN and CLKOUT RISE POSN description in Register Address 42h section ........................ 73
Changes from Revision A (May 2011) to Revision B
Page
• Changed sub-bullets of first Features bullet........................................................................................................................... 1
• Updated description of NC pin in LVDS Pin Descriptions table ............................................................................................. 7
• Updated description of NC pin in CMOS Pin Descriptions table.......................................................................................... 10
• Changed ENOB, DNL, and INL test conditions in the Electrical Characteristics: ADS4246/ADS4245/ADS4242 table ..... 14
• Deleted INL minimum specifications from Electrical Characteristics: ADS4246/ADS4245/ADS4242 table ........................ 14
• Changed INL maximum specifications in the Electrical Characteristics: ADS4246/ADS4245/ADS4242 table.................... 14
• Changed ENOB, DNL, and INL test conditions in the Electrical Characteristics: ADS4226/ADS4225/ADS4222 table ..... 17
• Changed ADS4226 INL maximum specification in the Electrical Characteristics: ADS4226/ADS4225/ADS4222 table ..... 17
• Changed Power Supply, IDRVDD and Digital power CMOS interface rows in the Electrical Characteristics: General
table ...................................................................................................................................................................................... 18
• Updated Figure 16................................................................................................................................................................ 25
• Updated Figure 18................................................................................................................................................................ 26
• Updated Figure 37 and Figure 38 ........................................................................................................................................ 29
• Updated Figure 39 and Figure 40 ........................................................................................................................................ 29
• Updated Figure 58 and Figure 59 ........................................................................................................................................ 33
• Updated Figure 60 and Figure 61 ........................................................................................................................................ 34
• Updated Figure 79 and Figure 80 ........................................................................................................................................ 37
• Updated Figure 81 and Figure 82 ........................................................................................................................................ 37
• Updated Figure 96................................................................................................................................................................ 40
• Updated Figure 97 and SBAS533graph8650 ....................................................................................................................... 40
• Updated Figure 115.............................................................................................................................................................. 43
• Updated Figure 127.............................................................................................................................................................. 46
• Changed title of Figure 128 .................................................................................................................................................. 46
• Updated ADS424x/422x Family Pins section in Table 4 ...................................................................................................... 51
• Changed 111110 and 001111 LVDS SWING description in Register Address 01h ............................................................ 68
5 Description (continued)
The ADS424x/422x have gain options that can be used to improve SFDR performance at lower full-scale input
ranges. These devices include a dc offset correction loop that can be used to cancel the ADC offset. Both DDR
(double data rate) LVDS and parallel CMOS digital output interfaces are available in a compact VQFN-64
package.
The devices include internal references while the traditional reference pins and associated decoupling capacitors
have been eliminated. All devices are specified over the industrial temperature range (–40°C to 85°C).
Copyright © 2011–2015, Texas Instruments Incorporated
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Product Folder Links: ADS4222 ADS4225 ADS4226 ADS4242 ADS4245 ADS4246
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