Bus Buffer. P82B96 Datasheet

P82B96 Buffer. Datasheet pdf. Equivalent

P82B96 Datasheet
Recommendation P82B96 Datasheet
Part P82B96
Description Bus Buffer
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P82B96
SCPS144C – MAY 2006 – REVISED MAY 2015
P82B96 I2C Compatible Dual Bidirectional Bus Buffer
1 Features
1 Operating Power-Supply Voltage Range
of 2 V to 15 V
• Can Interface Between I2C Buses Operating at
Different Logic Levels (2 V to 15 V)
• Longer Cables by allowing bus capacitance of
400 pF on Main Side (Sx/Sy) and 4000 pF on
Transmission Side (Tx/Ty)
• Outputs on the Transmission Side (Tx/Ty) Have
High Current Sink Capability for Driving Low-
Impedance or High-Capacitive Buses
• Interface With Optoelectrical Isolators and Similar
Devices That Need Unidirectional Input and
Output Signal Paths by Splitting I2C Bus Signals
Into Pairs of Forward (Tx/Ty) and Reverse (Rx/Ry)
Signals
• 400-kHz Fast I2C Bus Operation Over at Least
20 Meters of Wire
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
2 Applications
• HDMI DDC
• Long I2C Communication
• Galvanic I2C Isolation
• Industrial Communications
3 Description
The P82B96 device is a bus buffer that supports
bidirectional data transfer between an I2C bus and a
range of other bus configurations with different
voltage and current levels.
One of the advantages of the P82B96 is that it
supports longer cables/traces and allows for more
devices per I2C bus because it can isolate bus
capacitance such that the total loading (devices and
trace lengths) of the new bus or remote I2C nodes
are not apparent to other I2C buses (or nodes). The
restrictions on the number of I2C devices in a system
due to capacitance, or the physical separation
between them, are greatly improved.
The device is able to provide galvanic isolation
(optocoupling) or use balanced transmission lines
(twisted pairs), because separate directional Tx and
Rx signals are provided. The Tx and Rx signals may
be connected directly (without causing bus latching),
to provide an bidirectional signal line with I2C
properties (open-drain driver). Likewise, the Ty and
Ry signals may also be connected together to provide
an bidirectional signal line with I2C properties (open-
drain driver). This allows for a simple communication
design, saving design time and costs.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
SOIC (8)
4.90 mm × 3.91 mm
P82B96
VSSOP (8)
PDIP (8)
3.00 mm × 3.00 mm
9.81 mm × 6.35 mm
TSSOP (8)
3.00 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Main Enclosure
12 V
3.3–5 V
Long-Distance I2C Communications
Remote-Control Enclosure
12 V
Long Cables
3.3–5 V
SCL
3.3–5 V
12 V
SCL
3.3–5 V
SDA
P82B96
P82B96
SDA
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.



Texas Instruments P82B96
P82B96
SCPS144C – MAY 2006 – REVISED MAY 2015
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Description (continued)......................................... 3
6 Pin Configuration and Functions ......................... 4
7 Specifications......................................................... 5
7.1 Absolute Maximum Ratings ..................................... 5
7.2 ESD Ratings.............................................................. 5
7.3 Recommended Operating Conditions....................... 5
7.4 Thermal Information .................................................. 5
7.5 Electrical Characteristics: VCC = 2.3 V to 2.7 V ........ 6
7.6 Electrical Characteristics: VCC = 3 V to 3.6 V ........... 7
7.7 Electrical Characteristics: VCC = 4.5 V to 5.5 V ........ 8
7.8 Electrical Characteristics: VCC = 15 V....................... 9
7.9 Switching Characteristics ........................................ 10
7.10 Typical Characteristics .......................................... 11
8 Parameter Measurement Information ................ 12
9 Detailed Description ............................................ 13
9.1 Overview ................................................................. 13
9.2 Functional Block Diagram ....................................... 13
9.3 Feature Description................................................. 14
9.4 Device Functional Modes........................................ 14
10 Application and Implementation........................ 15
10.1 Application Information.......................................... 15
10.2 Typical Applications .............................................. 17
11 Power Supply Recommendations ..................... 21
12 Layout................................................................... 21
12.1 Layout Guidelines ................................................. 21
12.2 Layout Example .................................................... 21
13 Device and Documentation Support ................. 22
13.1 Community Resources.......................................... 22
13.2 Trademarks ........................................................... 22
13.3 Electrostatic Discharge Caution ............................ 22
13.4 Glossary ................................................................ 22
14 Mechanical, Packaging, and Orderable
Information ........................................................... 22
4 Revision History
Changes from Revision B (July 2007) to Revision C
Page
• Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
• Changed VCC pins to VCC pins in pinout diagrams................................................................................................................ 4
2 Submit Documentation Feedback
Product Folder Links: P82B96
Copyright © 2006–2015, Texas Instruments Incorporated



Texas Instruments P82B96
www.ti.com
P82B96
SCPS144C – MAY 2006 – REVISED MAY 2015
5 Description (continued)
Two or more Sx or Sy I/Os must not be connected to each other on the same node. The P82B96 design does
not support this configuration. Bidirectional I2C signals do not have a direction control pin so, instead, slightly
different logic low-voltage levels are used at Sx/Sy to avoid latching of this buffer. A standard I2C low applied at
the Rx/Ry of a P82B96 is propagated to Sx/Sy as a buffered low with a slightly higher voltage level. If this special
buffered low is applied to the Sx/Sy of another P82B96, the second P82B96 does not recognize it as a standard
I2C bus low and does not propagate it to its Tx/Ty output. The Sx/Sy side of P82B96 may not be connected to
similar buffers that rely on special logic thresholds for their operation.
The Sx/Sy side of the P82B96 is intended for I2C logic voltage levels of I2C master and slave devices or Tx/Rx
signals of a second P82B96, if required. If Rx and Tx are connected, Sx can function as either the SDA or SCL
line. Similarly, if Ry and Ty are connected, Sy can function as either the SDA or SCL line. There are no
restrictions on the interconnection of the Tx/Rx and Ty/Ry I/O pins to other P82B96s, for example in a star or
multi-point configuration (multiple P82B96 devices share the same Tx/Rx and Ty/Ry nodes) with the Tx/Rx and
Ty/Ry I/O pins on the common bus, and the Sx/Sy side connected to the line-card slave devices.
In any design, the Sx pins of different devices should never be linked, because the resulting system would be
very susceptible to induced noise and would not support all I2C operating modes.
Copyright © 2006–2015, Texas Instruments Incorporated
Product Folder Links: P82B96
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