Buck Controller. LM5116WG Datasheet

LM5116WG Controller. Datasheet pdf. Equivalent

LM5116WG Datasheet
Recommendation LM5116WG Datasheet
Part LM5116WG
Description Wide Range Synchronous Buck Controller
Feature LM5116WG; LM5116WG www.ti.com SNVS599D – OCTOBER 2008 – REVISED FEBRUARY 2013 LM5116WG Wide Range Synchrono.
Manufacture etcTI
Datasheet
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Texas Instruments LM5116WG
LM5116WG
www.ti.com
SNVS599D – OCTOBER 2008 – REVISED FEBRUARY 2013
LM5116WG Wide Range Synchronous Buck Controller
Check for Samples: LM5116WG
FEATURES
1
2 Hermetic Package for Harsh Operating
Environments
• Emulated Peak Current Mode
• Wide Operating Range up to 100V
• Low IQ Shutdown (< 10 µA)
• Drives Standard or Logic Level MOSFETs
• Robust 3.5A Peak Gate Drive
• Free-Run or Synchronous Operation to 1 MHz
• Optional Diode Emulation Mode
• Programmable Output from 1.215V to 80V
• Precision 1.5% Voltage Reference
• Programmable Current Limit
• Programmable Soft-Start
• Programmable Line Under-Voltage Lockout
• Automatic Switch to External Bias Supply
• CPGA-20 with No Thermal Shutdown
DESCRIPTION
The LM5116WG is a synchronous buck controller
intended for step-down regulator applications from a
high voltage or widely varying input supply. The
control method is based upon current mode control
utilizing an emulated current ramp. Current mode
control provides inherent line feed-forward, cycle by
cycle current limiting and ease of loop compensation.
The use of an emulated control ramp reduces noise
sensitivity of the pulse-width modulation circuit,
allowing reliable control of very small duty cycles
necessary in high input voltage applications. The
operating frequency is programmable from 50 kHz to
1 MHz. The LM5116WG drives external high-side and
low-side NMOS power switches with adaptive dead-
time control. A user-selectable diode emulation mode
enables discontinuous mode operation for improved
efficiency at light load conditions. A low quiescent
current shutdown disables the controller and
consumes less than 10 µA of total input current.
Additional features include a high voltage bias
regulator, automatic switch-over to external bias for
improved efficiency, frequency synchronization, cycle
by cycle current limit and adjustable line under-
voltage lockout. The device is available in a CPGA-20
high temperature ceramic package with the thermal
shutdown feature disabled.
Typical Application
VIN
VIN
CIN RUV2
UVLO
RUV1
C SYNC
RT
EN
RT/SYNC
LM5116WG
VCC
HB
CHB
HO
SW
LO
CS
CHF
CCOMP
RCOMP
COMP
FB
SS
CSG
DEMB
RAMP
VOUT
VCCX
AGND PGND
CSS
C RAMP
C VCC
VIN
L
RS
R FB2
RFB1
VOUT
C OUT
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008–2013, Texas Instruments Incorporated



Texas Instruments LM5116WG
LM5116WG
SNVS599D – OCTOBER 2008 – REVISED FEBRUARY 2013
Connection Diagram
VIN
UVLO
RT/ SYNC
EN
RAMP
AGND
SS
FB
COMP
VOUT
1
2
3
4
5
6
7
8
9
10
20 SW
19 HO
18 HB
17 VCCX
16 VCC
15 LO
14 PGND
13 CSG
12 CS
11 DEMB
Figure 1. Top View
See Package Number NAR0020A
www.ti.com
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Copyright © 2008–2013, Texas Instruments Incorporated



Texas Instruments LM5116WG
LM5116WG
www.ti.com
SNVS599D – OCTOBER 2008 – REVISED FEBRUARY 2013
PIN DESCRIPTIONS
Pin Name Description
1 VIN Chip supply voltage, input voltage monitor and input to the VCC regulator.
2 UVLO If the UVLO pin is below 1.215V, the regulator will be in standby mode (VCC regulator running, switching regulator
disabled). If the UVLO pin voltage is above 1.215V, the regulator is operational. An external voltage divider can be used
to set an under-voltage shutdown threshold. There is a fixed 5 µA pull up current on this pin when EN is high. UVLO is
pulled to ground in the event a current limit condition exists for 256 clock cycles.
3 RT/SYN The internal oscillator is set with a single resistor between this pin and the AGND pin. The recommended frequency
C range is 50 kHz to 1 MHz. The internal oscillator can be synchronized to an external clock by AC coupling a positive
edge onto this node.
4 EN If the EN pin is below 0.5V, the regulator will be in a low power state drawing less than 10 µA from VIN. EN must be
pulled above 3.3V for normal operation.
5 RAMP Ramp control signal. An external capacitor connected between this pin and the AGND pin sets the ramp slope used for
current mode control.
6 AGND Analog ground. Connect directly to PGND under the LM5116WG.
7 SS An external capacitor and an internal 10 µA current source set the soft start time constant for the rise of the error amp
reference. The SS pin is held low during VCC < 4.5V, UVLO < 1.215V, or EN input low.
8 FB Feedback signal from the regulated output. This pin is connected to the inverting input of the internal error amplifier. The
regulation threshold is 1.215V.
9 COMP Output of the internal error amplifier. The loop compensation network should be connected between this pin and the FB
pin.
10 VOUT Output monitor. Connect directly to the output voltage.
11 DEMB Low-side MOSFET source voltage monitor for diode emulation. For start-up into a pre-biased load, tie this pin to ground
at the CSG connection. For fully synchronous operation, use an external series resistor between DEMB and ground to
raise the diode emulation threshold above the low-side SW on-voltage.
12 CS Current sense amplifier input. Connect to the top of the current sense resistor or the drain of the low-sided MOSFET if
RDS(ON) current sensing is used.
13 CSG Current sense amplifier input. Connect to the bottom of the sense resistor or the source of the low-side MOSFET if
RDS(ON) current sensing is used.
14 PGND Power ground. Connect directly to AGND under the LM5116WG.
15 LO Connect to the gate of the low-side synchronous MOSFET through a short, low inductance path.
16 VCC Locally decouple to PGND using a low ESR/ESL capacitor located as close to the controller as possible.
17 VCCX Optional input for an externally supplied VCC. If VCCX > 4.5V, VCCX is internally connected to VCC and the internal
VCC regulator is disabled. If VCCX is unused, it should be connected to ground.
18 HB High-side driver supply for bootstrap gate drive. Connect to the cathode of the bootstrap diode and the positive terminal
of the bootstrap capacitor. The bootstrap capacitor supplies current to charge the high-side MOSFET gate and should be
placed as close to the controller as possible.
19 HO Connect to the gate of the high-side synchronous MOSFET through a short, low inductance path.
20 SW Switch node. Connect to the negative terminal of the bootstrap capacitor and the source terminal of the high-side
MOSFET.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LM5116WG
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