Buck Controller. LM5141-Q1 Datasheet

LM5141-Q1 Controller. Datasheet pdf. Equivalent

LM5141-Q1 Datasheet
Recommendation LM5141-Q1 Datasheet
Part LM5141-Q1
Description Wide Input Range Synchronous Buck Controller
Feature LM5141-Q1; Product Folder Order Now Technical Documents Tools & Software Support & Community Reference Des.
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Texas Instruments LM5141-Q1
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Technical
Documents
Tools &
Software
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Design
LM5141-Q1
SNVSAJ6D – JULY 2016 – REVISED DECEMBER 2017
LM5141-Q1 Wide Input Range Synchronous Buck Controller
1 Features
1 Qualified for Automotive Applications
• AEC-Q100 Qualified With the Following Results:
– Device Temperature Grade 1: –40°C to
+125°C Ambient Operating Temperature
– Device HBM ESD Classification Level 2
– Device CDM ESD Classification Level C4B
• VIN: 3.8 V to 65 V (70 V Absolute Maximum)
• Output: Fixed 3.3 V, 5 V, or Adjustable From
1.5 V to 15 V with ±0.8% Accuracy
• Fixed 2.2-MHz or 440-kHz Switching Frequency
with ±5% Accuracy
• High-Side and Low-Side Gate Drive With Slew-
Rate Control
• Optional Frequency Shift by Varying an Analog
Voltage or RT Resistor
• Optional Synchronization to an External Clock
• Optional Spread Spectrum
• Shutdown Mode IQ: 10 µA Typical
• Low Standby Mode IQ: 35 µA Typical
• 75-mV Current Limit Threshold with ±0.9%
Accuracy
• External Resistor or DCR Current Sensing
• Output Enable Logic Input
• Hiccup Mode for Sustained Overload
• Power-Good Indication Output
• Selectable Diode Emulation or Forced Pulse-
Width Modulation
• 24-pin VQFN Package With Wettable Flanks
• Create a Custom Design Using the LM5141-Q1
With the WEBENCH® Power Designer
2 Applications
• Automotive Applications Including:
– Infotainment Systems
– Instrumentation Clusters
– Advanced Driver Assistance Systems (ADAS)
3 Description
The LM5141-Q1 is a synchronous buck controller,
intended for high voltage wide VIN step-down
converter applications. The control method is peak
current mode control. Current mode control provides
inherent line feed-forward, cycle-by-cycle current
limiting, and ease-of-loop compensation. The
LM5141-Q1 features slew rate control to simplify the
compliance with CISPR and automotive EMI
requirements.
The LM5141-Q1 has two selectable switching
frequencies: 2.2 MHz and 440 kHz. Gate drivers with
slew rate Control that can be adjusted to reduce EMI.
In light or no-load conditions, the LM5141-Q1
operates in skip cycle mode for improved low power
efficiency. The LM5141-Q1 has a high voltage bias
regulator with automatic switch-over to an external
bias to reduce the IQ current from VIN. Additional
features include frequency synchronization, cycle-by-
cycle current limit, hiccup mode fault protection for
sustained overload, and power good output.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
LM5141-Q1
VQFN (24)
4.00 mm × 4.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
CRES
VIN
CIN
CSS
CDITH
Simplified Schematic
RES
SS
DITH
EN
DEMB
VIN VCC
LM5141-Q1
HB
HO
HOL
SW
LO
LOL
PGND
PG
CS
VOUT
VCCX
COMP
DBST
CBST
CVCC
RCOMP CCOMP
LOUT
RSENSE
VOUT
COUT
AGND
RT
RT
FB
OSC VDDA
CVDDA
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.



Texas Instruments LM5141-Q1
LM5141-Q1
SNVSAJ6D – JULY 2016 – REVISED DECEMBER 2017
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 5
6.3 Recommended Operating Conditions....................... 5
6.4 Thermal Information .................................................. 5
6.5 Electrical Characteristics........................................... 6
6.6 Switching Characteristics .......................................... 8
6.7 Typical Characteristics .............................................. 9
7 Detailed Description ............................................ 12
7.1 Overview ................................................................. 12
7.2 Functional Block Diagram ....................................... 12
7.3 Feature Description................................................. 13
8 Application and Implementation ........................ 22
8.1 Application Information............................................ 22
8.2 Typical Application ................................................. 22
9 Power Supply Recommendations...................... 35
10 Layout................................................................... 35
10.1 Layout Guidelines ................................................. 35
10.2 Layout Examples................................................... 36
11 Device and Documentation Support ................. 39
11.1 Custom Design With WEBENCH® Tools ............. 39
11.2 Receiving Notification of Documentation Updates 39
11.3 Community Resources.......................................... 39
11.4 Trademarks ........................................................... 39
11.5 Electrostatic Discharge Caution ............................ 39
11.6 Glossary ................................................................ 39
12 Mechanical, Packaging, and Orderable
Information ........................................................... 39
4 Revision History
Changes from Revision C (February 2017) to Revision D
Page
• Added top navigator icon for TI Design reference design ..................................................................................................... 1
• Changed "CDS18534Q5A" to "CSD18534Q5A" to fix typo.................................................................................................. 29
• Changed "+" to "×" in Equation 56 ...................................................................................................................................... 32
Changes from Revision B (January 2017) to Revision C
Page
• Changed the FBD with updates in the CS pin area ............................................................................................................. 12
• Updated ISTEP definition in Equation 28 ............................................................................................................................... 25
Changes from Revision A (July 2016) to Revision B
Page
• Added 'Systems' to the ADAS bullet in Applications ............................................................................................................. 1
• Changed Description text From: 'conducted EMI' To: 'EMI' ................................................................................................... 1
• Changed test conditions for RT parameter from: OSC = VDD to: OSC = GND ................................................................... 8
• Changed equation unit From: '0.815 Apk' To: '0.815 A' ....................................................................................................... 24
• Changed equation unit From: '6.41 Apk' To: '6.41 A' ........................................................................................................... 24
• Changed equation unit From: '8.81 Apk' To: ' 8.81 A' .......................................................................................................... 25
• Changed equation unit From: '0.235 ARMS' To: '0.235 A'...................................................................................................... 26
• Changed text From: 'a capacitance value greater than filter capacitor CIN' To: 'a capacitance value greater than 5
times the filter capacitor CIN' ................................................................................................................................................ 28
• Changed equation text From: '62A' and '105 nc' To: '(6A)2' and '105 nC' ............................................................................ 28
• Added GCS to equation definition list .................................................................................................................................... 31
• Added Ω and µS symbols to equation text ........................................................................................................................... 33
Changes from Original (July 2016) to Revision A
Page
• Changed Product Preview to Production Data Release ........................................................................................................ 1
2 Submit Documentation Feedback
Product Folder Links: LM5141-Q1
Copyright © 2016–2017, Texas Instruments Incorporated



Texas Instruments LM5141-Q1
www.ti.com
5 Pin Configuration and Functions
LM5141-Q1
SNVSAJ6D – JULY 2016 – REVISED DECEMBER 2017
RGE Package
24-Pin VQFN With Exposed Thermal Pad
Top View
DEMB
VDDA
AGND
RT
DITH
OSC
1
2
3
4
5
6
Thermal
Pad
18 CS
17 VOUT
16 VCCX
15 VIN
14 HOL
13 HO
Connect Exposed Pad on bottom to AGND and PGND on the PCB.
Not to scale
PIN
NO. NAME
1 DEMB
2 VDDA
3 AGND
4 RT
5 DITH
6 OSC
7 LOL
8 LO
9 PGND
10 VCC
11 HB
12 SW
13 HO
14 HOL
TYPE
I
P
G
I
O
I
O
O
G
P
P
O
O
Pin Functions
DESCRIPTION
Diode emulation pin. Connect the DEMB pin to AGND to enable diode emulation. If it is
connected to VDDA the LM5141-Q1 operates in forced PWM (FPWM) mode with continuous
conduction at light loads. The DEMB pin can also be used as a synchronization input, to
synchronize the internal oscillator to an external clock.
Internal analog bias regulator output. Connect a capacitor from the VDDA pin to AGND.
Analog ground connection. Ground return for the internal voltage reference and analog
circuits.
A resistor from the RT pin to ground shifts the oscillator frequency up or down from 2.2 MHz
(1.8 MHz to 2.53 MHz), or 440 kHz (300 kHz to 500 kHz). An analog voltage can be applied
to the RT pin (through a resistor) to shift the oscillator frequency.
A capacitor connected between the DITH pin and AGND is charged and discharged with a
20 µA current source. If Dither is enabled, the voltage on the DITH pin ramps up and down
modulating the oscillator frequency between –5% and +5% of the internal oscillator.
Connecting DITH to VDDA disables the dithering feature. DITH is ignored if an external
synchronization clock is used.
Frequency selection pin. Connecting the OSC pin to VDDA sets the oscillator frequency to
2.2 MHz. Connecting the OSC pin to AGND sets the frequency to 440 kHz.
Low-side gate driver turnoff output.
Low-side gate driver turnon output.
Power ground connection pin for low-side NMOS gate driver.
VCC bias supply pin. Connect a capacitor from the VCC pin to PGND.
High-side driver supply for bootstrap gate drive.
Switching node of the buck regulator. Connect to the bootstrap capacitor, the source terminal
of the high-side MOSFET and the drain terminal of the low-side MOSFET.
High-side gate driver turnon output.
High-side gate driver turnoff output.
Copyright © 2016–2017, Texas Instruments Incorporated
Product Folder Links: LM5141-Q1
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