DatasheetsPDF.com

32-Bit MCU. MVF62NN152CMK40 Datasheet

DatasheetsPDF.com

32-Bit MCU. MVF62NN152CMK40 Datasheet






MVF62NN152CMK40 MCU. Datasheet pdf. Equivalent




MVF62NN152CMK40 MCU. Datasheet pdf. Equivalent





Part

MVF62NN152CMK40

Description

32-Bit MCU



Feature


NXP Semiconductors Data Sheet: Technical Data Document Number VYBRIDFSERIESEC Rev. 9, 01/2018 VF6xx, VF5xx, VF3xx Fe atures • Operating characteristics †“ Voltage range 3 V to 3.6 V – Temper ature range(ambient) -40 °C to 85 °C • ARM® Cortex® A5 Core features – Up to 500 MHz ARM Cortex A5 – 32 KB/ 32 KB I/D L1 Cache – 1.6 DMIPS/MHz ba sed on ARMv7 architecture – NEON™ MP.
Manufacture

NXP

Datasheet
Download MVF62NN152CMK40 Datasheet


NXP MVF62NN152CMK40

MVF62NN152CMK40; E (Media Processing Engine) Coprocessor – Double Precision Floating Point Uni t – 512 KB L2 cache (on selected part numbers only) • ARM Cortex M4 Core f eatures – Up to 167 MHz ARM Cortex M4 – Integrated DSP capability – 64 K B Tightly Coupled Memory (TCM) – 16 K B/16 KB I/D L1 Cache – 1.25 DMIPS/MHz based on ARMv7 architecture • Clocks – 24 MHz crystal oscillator – 32 kH.


NXP MVF62NN152CMK40

z crystal oscillator – Internal refere nce clocks (128 KHz and 24 MHz) – Pha se Locked Loops (PLLs) – Low Jitter D igital PLLs • System debug, protectio n, and power management – Various sto p, wait, and run modes to provide low p ower based on application needs – Per ipheral clock enable register can disab le clocks to unused modules, thereby re ducing currents – Low voltage .


NXP MVF62NN152CMK40

warning and detect with selectable trip points – Illegal opcode and illegal a ddress detection with programmable rese t or processor exception response – H ardware CRC module to support fast cycl ic redundancy checks (CRC) – 128-bit unique chip identifier – Hardware wat chdog – External Watchdog Monitor (EW M) – Dual DMA controller with 32 chan nels (with DMAMUX) VYBRIDFSER.

Part

MVF62NN152CMK40

Description

32-Bit MCU



Feature


NXP Semiconductors Data Sheet: Technical Data Document Number VYBRIDFSERIESEC Rev. 9, 01/2018 VF6xx, VF5xx, VF3xx Fe atures • Operating characteristics †“ Voltage range 3 V to 3.6 V – Temper ature range(ambient) -40 °C to 85 °C • ARM® Cortex® A5 Core features – Up to 500 MHz ARM Cortex A5 – 32 KB/ 32 KB I/D L1 Cache – 1.6 DMIPS/MHz ba sed on ARMv7 architecture – NEON™ MP.
Manufacture

NXP

Datasheet
Download MVF62NN152CMK40 Datasheet




 MVF62NN152CMK40
NXP Semiconductors
Data Sheet: Technical Data
Document Number VYBRIDFSERIESEC
Rev. 9, 01/2018
VF6xx, VF5xx, VF3xx
Features
• Operating characteristics
– Voltage range 3 V to 3.6 V
– Temperature range(ambient) -40 °C to 85 °C
• ARM® Cortex® A5 Core features
– Up to 500 MHz ARM Cortex A5
– 32 KB/32 KB I/D L1 Cache
– 1.6 DMIPS/MHz based on ARMv7 architecture
– NEON™ MPE (Media Processing Engine) Co-
processor
– Double Precision Floating Point Unit
– 512 KB L2 cache (on selected part numbers only)
• ARM Cortex M4 Core features
– Up to 167 MHz ARM Cortex M4
– Integrated DSP capability
– 64 KB Tightly Coupled Memory (TCM)
– 16 KB/16 KB I/D L1 Cache
– 1.25 DMIPS/MHz based on ARMv7 architecture
• Clocks
– 24 MHz crystal oscillator
– 32 kHz crystal oscillator
– Internal reference clocks (128 KHz and 24 MHz)
– Phase Locked Loops (PLLs)
– Low Jitter Digital PLLs
• System debug, protection, and power management
– Various stop, wait, and run modes to provide low
power based on application needs
– Peripheral clock enable register can disable clocks to
unused modules, thereby reducing currents
– Low voltage warning and detect with selectable trip
points
– Illegal opcode and illegal address detection with
programmable reset or processor exception response
– Hardware CRC module to support fast cyclic
redundancy checks (CRC)
– 128-bit unique chip identifier
– Hardware watchdog
– External Watchdog Monitor (EWM)
– Dual DMA controller with 32 channels (with
DMAMUX)
VYBRIDFSERIESEC
• Debug
– Standard JTAG
– 16-bit Trace port
• Timers
– Motor control/general purpose timer (FTM)
– Periodic Interrupt Timers (PITs)
– Low-power timer (LPTMR0)
– IEEE 1588 Timer per MAC interface (part of
Ethernet Subsystem)
• Communications
– Six Universal asynchronous receivers/transmitters
(UART)/Serial communications interface (SCI) with
LIN, ISO7816, IrDA, and hardware flow control
– Four Deserial Serial peripheral interface (DSPI)
– Four Inter-Integrated Circuit (I2C) with SMBUS
support
– Dual USB OTG Controller + PHY
– Dual 4/8 bit Secure Digital Host controller
– Dual 10/100 Ethernet with L2 Switch (IEEE 1588)
– Dual FlexCAN3
• Security
– ARM TrustZone including the TZ architecture
– Cryptographic Acceleration and Assurance Module,
incorporates 16 KB secure RAM (CAAM)
– Secure Non-Volatile Storage, including Secure Real
Time Clock (SNVS)
– Real Time Integrity Checker (RTIC)
– Tamper detection - supported by external pins, on-
chip clock monitors, voltage and temperature
tampers
– TrustZone Watchdog (TZ WDOG)
– Trust Zone Address Space Controller
– Central Security Unit
– Secure JTAG
– High Assurance Boot (HAB) with support for
encrypted boot
• Memory Interfaces
– 8/16 bit DRAM Controller with support for
LPDDR2/DDR3 - Up to 400 MHz (ECC supported
for 8-bit only and not 16-bit)
– 8/16 bit NAND Flash controller with ECC
– 8/16/32 bit External bus (Flexbus)
– Dual Quad SPI with XIP (Execute-In-Place)
NXP reserves the right to change the production detail specifications as may be
required to permit improvements in the design of its products.




 MVF62NN152CMK40
• Display and Video
– Dual Display Control Unit (DCU) with support for color TFT display up to SVGA
– Segmented LCD (3V Glass only) configurable as 40x4, 38x8, and 36x6
– Video Interface Unit (VIU) for camera
– Open VG Graphics Processing Unit (GPU)
– VideoADC
• Analog
– Dual 12-bit SAR ADC with 1MS/s
– Dual 12-bit DAC
• Audio
– Four Synchronous Audio Interface (SAI)
– Enhanced Serial Audio Interface (ESAI)
– Sony Philips Digital Interface (SPDIF), Rx and Tx
– Asynchronous Sample Rate Converter (ASRC)
• Human-Machine Interface (HMI)
– GPIO pins with interrupt support, DMA request capability, digital glitch filter.
– Hysteresis and configurable pull up/down device on all input pins
– Configurable slew rate and drive strength on all output pins
• On-Chip Memory
– 512 KB On-chip SRAM with ECC
– 1 MB On-chip graphics SRAM (no ECC). This depends on the part selected. Alternate configuration could be 512 KB
graphics and 512 KB L2 cache.
– 96 KB Boot ROM
VF6xx, VF5xx, VF3xx, Rev. 9, 01/2018
2 NXP Semiconductors




 MVF62NN152CMK40
Table of Contents
1 Ordering parts.....................................................................................5
6.2.5.1 Power Down Mode............................. 20
1.1 Determining valid orderable parts ..........................................5
6.2.6 EMC radiated emissions operating behaviors........ 20
2 Part identification............................................................................... 5
6.2.7 EMC Radiated Emissions Web Search Procedure
2.1 Description.............................................................................. 5
boilerplate............................................................... 21
2.2 Part Number Format................................................................5
6.2.8 Capacitance attributes............................................. 21
2.3 Part Numbers ..........................................................................6
7 I/O parameters....................................................................................21
3 Terminology and guidelines...............................................................7
7.1 GPIO parameters..................................................................... 21
3.1 Definition: Operating requirement.......................................... 7
7.1.1 Output Buffer Impedance measurement................. 23
3.2 Definition: Operating behavior............................................... 7
7.2 DDR parameters......................................................................24
3.3 Definition: Attribute................................................................8
8 Power supplies and sequencing..........................................................27
3.4 Definition: Rating....................................................................8
8.1 Power sequencing ...................................................................27
3.5 Result of exceeding a rating.................................................... 9
8.2 Power supply........................................................................... 29
3.6 Relationship between ratings and operating requirements......9
8.3 Absolute maximum ratings..................................................... 30
3.7 Guidelines for ratings and operating requirements................. 9
8.4 Recommended operating conditions....................................... 31
3.8 Definition: Typical value........................................................ 10
8.5 Recommended Connections for Unused Analog Interfaces... 32
3.9 Typical Value Conditions........................................................11
9 Peripheral operating requirements and behaviours............................ 33
4 Handling ratings................................................................................. 11
9.1 Analog..................................................................................... 33
4.1 ESD Handling Ratings Table [JEDEC].................................. 11
9.1.1 12-bit ADC electrical characteristics...................... 33
4.2 Thermal handling ratings........................................................ 11
9.1.1.1 12-bit ADC operating conditions........ 33
4.3 Moisture handling ratings........................................................12
9.1.1.2 12-bit ADC characteristics..................34
5 Operating Requirements.....................................................................12
9.1.2 12-bit DAC electrical characteristics...................... 38
5.1 Thermal operating requirements............................................. 12
9.1.2.1 12-bit DAC operating requirements....38
6 General............................................................................................... 12
9.1.2.2 12-bit DAC operating behaviors......... 38
6.1 AC electrical characteristics....................................................12
9.1.3 VideoADC Specifications.......................................42
6.2 Nonswitching electrical specifications ...................................13
9.2 Display and Video interfaces.................................................. 44
6.2.1 VREG electrical specifications .............................. 13
9.2.1 DCU Switching Specifications............................... 44
6.2.1.1 HPREG electrical characteristics........ 13
9.2.1.1 Interface to TFT panels (DCU0/1)......44
6.2.1.2 LPREG electrical characteristics.........13
9.2.1.2 Interface to TFT LCD Panels—Pixel
6.2.1.3 ULPREG electrical characteristics......14
Level Timings..................................... 45
6.2.1.4 WBREG electrical characteristics.......14
9.2.1.3 Interface to TFT LCD panels—access
6.2.1.5 External NPN Ballast.......................... 15
level..................................................... 46
6.2.2 LVD electrical specifications .................................17
9.2.2 Video Input Unit timing..........................................47
6.2.2.1 Main Supply electrical characteristics 17
9.2.3 LCD driver electrical characteristics...................... 48
6.2.2.2 LVD DIG characteristics.....................17
9.3 Ethernet specifications............................................................ 49
6.2.3 LDO electrical specifications .................................18
9.3.1 Ethernet Switching Specifications.......................... 49
6.2.3.1 LDO_1P1............................................ 18
9.3.2 Receive and Transmit signal timing specifications 49
6.2.3.2 LDO_2P5............................................ 18
9.3.3 Receive and Transmit signal timing specifications
6.2.3.3 LDO_3P0 ........................................... 19
for MII interfaces.................................................... 50
6.2.4 Power consumption operating behaviors................ 19
9.4 Audio interfaces...................................................................... 52
6.2.5 USB PHY current consumption..............................20
NXP Semiconductors
VF6xx, VF5xx, VF3xx, Rev. 9, 01/2018
3






Recommended third-party MVF62NN152CMK40 Datasheet






@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)