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Bus Switch. PCA9543A Datasheet

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Bus Switch. PCA9543A Datasheet






PCA9543A Switch. Datasheet pdf. Equivalent




PCA9543A Switch. Datasheet pdf. Equivalent





Part

PCA9543A

Description

2-Channel I2C Bus Switch



Feature


Product Folder Sample & Buy Technical Documents Tools & Software Support & Community PCA9543A SCPS169A – SEPTEM BER 2007 – REVISED JUNE 2014 PCA9543A 2-Channel I2C Bus Switch With Interrup t Logic and Reset 1 Features β€’1 1-of -2 Bidirectional Translating Switches β €’ I2C Bus and SMBus Compatible β€’ Two Active-Low Interrupt Inputs β€’ Active -Low Interrupt Output β€’ Active.
Manufacture

Texas Instruments

Datasheet
Download PCA9543A Datasheet


Texas Instruments PCA9543A

PCA9543A; -Low Reset Input β€’ Two Address Pins Al lowing up to Four PCA9543A Devices on t he I2C Bus β€’ Channel Selection Via I2 C Bus, in Any Combination β€’ Power-up With All Switch Channels Deselected β€’ Low RON Switches β€’ Allows Voltage-Le vel Translation Between 1.8-V, 2.5-V, 3 .3-V, and 5-V Buses β€’ No Glitch on Po wer-up β€’ Supports Hot Insertion β€’ L ow Standby Current β€’ Operating Pow.


Texas Instruments PCA9543A

er-Supply Voltage Range of 2.3 V to 5.5 V β€’ 5.5-V Tolerant Inputs β€’ 0 to 40 0-kHz Clock Frequency β€’ Latch-Up Perf ormance Exceeds 100-mA Per JESD78 β€’ E SD Protection Exceeds JESD 22 – 2000- V Human-Body Model (A114-A) – 1000-V Charged-Device Model (C101) 2 Applicat ions β€’ Servers β€’ Routers (Telecom S witching Equipment) β€’ Factory Automat ion β€’ Products With I2C Slave Addres.


Texas Instruments PCA9543A

s Conflicts (e.g. Multiple, Identical Te mp Sensors) 3 Description The PCA9543A is a dual bidirectional translating swi tch controlled by the I2C bus. The SCL/ SDA upstream pair fans out to two downs tream pairs, or channels. Either indivi dual SCn/SDn channel or both channels c an be selected, determined by the conte nts of the programmable control registe r. Two interrupt i.

Part

PCA9543A

Description

2-Channel I2C Bus Switch



Feature


Product Folder Sample & Buy Technical Documents Tools & Software Support & Community PCA9543A SCPS169A – SEPTEM BER 2007 – REVISED JUNE 2014 PCA9543A 2-Channel I2C Bus Switch With Interrup t Logic and Reset 1 Features β€’1 1-of -2 Bidirectional Translating Switches β €’ I2C Bus and SMBus Compatible β€’ Two Active-Low Interrupt Inputs β€’ Active -Low Interrupt Output β€’ Active.
Manufacture

Texas Instruments

Datasheet
Download PCA9543A Datasheet




 PCA9543A
Product
Folder
Sample &
Buy
Technical
Documents
Tools &
Software
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Community
PCA9543A
SCPS169A – SEPTEMBER 2007 – REVISED JUNE 2014
PCA9543A 2-Channel I2C Bus Switch With Interrupt Logic and Reset
1 Features
β€’1 1-of-2 Bidirectional Translating Switches
β€’ I2C Bus and SMBus Compatible
β€’ Two Active-Low Interrupt Inputs
β€’ Active-Low Interrupt Output
β€’ Active-Low Reset Input
β€’ Two Address Pins Allowing up to Four PCA9543A
Devices on the I2C Bus
β€’ Channel Selection Via I2C Bus, in Any
Combination
β€’ Power-up With All Switch Channels Deselected
β€’ Low RON Switches
β€’ Allows Voltage-Level Translation Between
1.8-V, 2.5-V, 3.3-V, and 5-V Buses
β€’ No Glitch on Power-up
β€’ Supports Hot Insertion
β€’ Low Standby Current
β€’ Operating Power-Supply Voltage Range of 2.3 V
to 5.5 V
β€’ 5.5-V Tolerant Inputs
β€’ 0 to 400-kHz Clock Frequency
β€’ Latch-Up Performance Exceeds 100-mA Per
JESD78
β€’ ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 1000-V Charged-Device Model (C101)
2 Applications
β€’ Servers
β€’ Routers (Telecom Switching Equipment)
β€’ Factory Automation
β€’ Products With I2C Slave Address Conflicts (e.g.
Multiple, Identical Temp Sensors)
3 Description
The PCA9543A is a dual bidirectional translating
switch controlled by the I2C bus. The SCL/SDA
upstream pair fans out to two downstream pairs, or
channels. Either individual SCn/SDn channel or both
channels can be selected, determined by the
contents of the programmable control register. Two
interrupt inputs (INT1–INT0), one for each of the
downstream pairs, are provided. One interrupt output
(INT) acts as an AND of the two interrupt inputs.
An active-low reset (RESET) input allows the
PCA9543A to recover from a situation where one of
the downstream I2C buses is stuck in a low state.
Pulling RESET low resets the I2C state machine and
causes both of the channels to be deselected, as
does the internal power-on reset function.
The pass gates of the switches are constructed such
that the VCC pin can be used to limit the maximum
high voltage, which will be passed by the PCA9543A.
This allows the use of different bus voltages on each
pair, so that 1.8-V, 2.5-V, or 3.3-V parts can
communicate with 5-V parts without any additional
protection. External pull-up resistors pull the bus up
to the desired voltage level for each channel. All I/O
pins are 5.5-V tolerant.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
PCA9543
TSSOP (14)
5.00 mm Γ— 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
4 Simplified Application Diagram
I2C or SMBus
Master
(e.g. Processor)
SDA
SCL
INT
VCC
RESET
Channel 0
SD0
SC0
INT0
Slaves A0, A1...AN
PCA9543A
A0
A1
GND
SD1 Channel 1
SC1
INT1
Slaves B0, B1...BN
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.




 PCA9543A
PCA9543A
SCPS169A – SEPTEMBER 2007 – REVISED JUNE 2014
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Simplified Application Diagram............................ 1
5 Revision History..................................................... 2
6 Pin Configuration and Functions ......................... 3
7 Specifications......................................................... 4
7.1 Absolute Maximum Ratings ..................................... 4
7.2 Handling Ratings....................................................... 4
7.3 Recommended Operating Conditions ...................... 4
7.4 Thermal Information .................................................. 5
7.5 Electrical Characteristics .......................................... 5
7.6 I2C Interface Timing Requirements........................... 6
7.7 Switching Characteristics .......................................... 7
7.8 Interrupt and Reset Timing Requirements ................ 7
8 Parameter Measurement Information .................. 8
9 Detailed Description ............................................ 10
9.1 Overview ................................................................. 10
9.2 Functional Block Diagram ....................................... 10
9.3 Feature Description................................................. 11
9.4 Device Functional Modes........................................ 11
9.5 Programming........................................................... 11
9.6 Control Register ...................................................... 13
10 Application and Implementation........................ 16
10.1 Application Information.......................................... 16
10.2 Typical Application ................................................ 16
11 Power Supply Recommendations ..................... 19
11.1 Power-On Reset Errata......................................... 19
12 Layout................................................................... 19
12.1 Layout Guidelines ................................................. 19
12.2 Layout Example .................................................... 20
13 Device and Documentation Support ................. 21
13.1 Trademarks ........................................................... 21
13.2 Electrostatic Discharge Caution ............................ 21
13.3 Glossary ................................................................ 21
14 Mechanical, Packaging, and Orderable
Information ........................................................... 21
5 Revision History
Changes from Original (September 2007) to Revision A
Page
β€’ Removed Ordering Information table. ................................................................................................................................... 2
β€’ Added Power-On Reset Errata section. .............................................................................................................................. 19
2 Submit Documentation Feedback
Copyright Β© 2007–2014, Texas Instruments Incorporated




 PCA9543A
www.ti.com
6 Pin Configuration and Functions
D PACKAGE
(TOP VIEW)
A0 1
A1 2
RESET 3
INT0 4
SD0 5
SC0 6
GND 7
14
V
CC
13 SDA
12 SCL
11 INT
10 SC1
9 SD1
8 INT1
A0 1
A1 2
RESET 3
INT0 4
SD0 5
SC0 6
GND 7
PCA9543A
SCPS169A – SEPTEMBER 2007 – REVISED JUNE 2014
PW PACKAGE
(TOP VIEW)
14
V
CC
13 SDA
12 SCL
11 INT
10 SC1
9 SD1
8 INT1
Pin Functions
PIN
NAME
D, PW
DESCRIPTION
A0
A1
RESET
INT0
SD0
SC0
GND
INT1
SD1
SC1
INT
SCL
SDA
VCC
1 Address input 0. Connect directly to VCC or ground.
2 Address input 1. Connect directly to VCC or ground.
3 Active-low reset input. Connect to VCC or VDPUM(1) through a pull-up resistor, if not used.
4 Active-low interrupt input 0. Connect to VDPU0(1) through a pull-up resistor.
5 Serial data 0. Connect to VDPU0(1) through a pull-up resistor.
6 Serial clock 0. Connect to aVDPU0(1) through a pull-up resistor.
7 Ground
8 Active-low interrupt input 1. Connect to VDPU1(1) through a pull-up resistor.
9 Serial data 1. Connect to VDPU1(1) through a pull-up resistor.
10 Serial clock 1. Connect to VDPU1(1) through a pull-up resistor.
11 Active-low interrupt output. Connect to VDPUM(1) through a pull-up resistor.
12 Serial clock line. Connect to VDPUM(1) through a pull-up resistor.
13 Serial data line. Connect to VDPUM(1) through a pull-up resistor.
14 Supply power
(1) VDPUX is the pull-up reference voltage for the associated data line. VDPUM is the master I2C reference voltage while VDPU0 and VDPU1 are
the slave channel reference voltages.
Copyright Β© 2007–2014, Texas Instruments Incorporated
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