I2C Switch. PCA9548A Datasheet

PCA9548A Switch. Datasheet pdf. Equivalent

Part PCA9548A
Description Low Voltage 8-Channel I2C Switch
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PCA9548A
SCPS143F – JUNE 2009 – REVISED APRIL 2019
PCA9548A Low Voltage 8-Channel I2C Switch with Reset
1 Features
1 1-of-8 Bidirectional Translating Switches
• I2C Bus and SMBus Compatible
• Active-Low Reset Input
• Three Hardware Address Pins for Use of up to
Eight PCA9548A Devices on the I2C Bus
• Channel Selection Via I2C Bus
• Power-Up with All Switch Channels Deselected
• Low RON Switches
• Allows Voltage-Level Translation Between
1.8-V, 2.5-V, 3.3-V, and 5-V Buses
• No Glitch on Power Up
• Supports Hot Insertion
• Low Standby Current
• Operating Power-Supply Voltage Range of
2.3 V to 5.5 V
• 5-V Tolerant Inputs
• 0-kHz to 400-kHz Clock Frequency
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
2 Applications
• Servers
• Routers (Telecom Switching Equipment)
• Factory Automation
• Products With I2C Slave Address Conflicts (for
example: Multiple, Identical Temp Sensors)
3 Description
The PCA9548A device has eight bidirectional
translating switches that can be controlled through
the I2C bus. The SCL/SDA upstream pair fans out to
eight downstream pairs, or channels. Any individual
SCx/SDx channel or combination of channels can be
selected, determined by the contents of the
programmable control register. These downstream
channels can be used to resolve I2C slave address
conflicts. For example, if eight identical digital
temperature sensors are needed in the application,
one sensor can be connected at each channel: 0-7.
The system master can reset the PCA9548A in the
event of a time-out or other improper operation by
asserting a low in the RESET input. Similarly, the
power-on reset deselects all channels and initializes
the I2C/SMBus state machine. Asserting RESET
causes the same reset and initialization to occur
without powering down the part. This allows recovery
should once of the downstream I2C buses get stuck
in a low state.
The pass gates of the switches are constructed so
that the VCC pin can be used to limit the maximum
high voltage, which is passed by the PCA9548A. This
allows the use of different bus voltages on each pair,
so that 1.8-V, 2.5-V or 3.3-V parts can communicate
with 5-V parts, without any additional protection.
External pull-up resistors pull the bus up to the
desired voltage level for each channel. All I/O pins
are 5-V tolerant.
DEVICE NAME
PCA9548A
Device Information(1)
PACKAGE
BODY SIZE (NOM)
SSOP (24)
8.20 mm × 5.30 mm
TVSOP (24)
5.00 mm × 4.40 mm
SOIC (24)
15.40 mm × 7.50 mm
TSSOP (24)
7.80 mm × 4.40 mm
VQFN (24)
4.00 mm × 4.00 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Simplified Schematic
I2C or SMBus
Master
(processor)
SDA
SCL
VCC
RESET
Channel 0
SD0
SC0
Slaves A0, A1...AN
Channel 1
SD1
SC1
Slaves B0, B1...BN
PCA9548A
A0
A1
A2
GND
SD2
SC2
SD7
SC7
Channel 2
Channel 7
Slaves C0, C1...CN
Slaves H0, H1...HN
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.



PCA9548A
PCA9548A
SCPS143F – JUNE 2009 – REVISED APRIL 2019
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 5
6.1 Absolute Maximum Ratings ..................................... 5
6.2 ESD Ratings.............................................................. 5
6.3 Recommended Operating Conditions ...................... 5
6.4 Thermal Information .................................................. 5
6.5 Electrical Characteristics........................................... 6
6.6 I2C Interface Timing Requirements........................... 7
6.7 Reset Timing Requirements ..................................... 8
6.8 Switching Characteristics .......................................... 8
6.9 Typical Characteristics .............................................. 9
7 Parameter Measurement Information ................ 10
8 Detailed Description ............................................ 12
8.1 Overview ................................................................. 12
8.2 Functional Block Diagram ....................................... 13
8.3 Feature Description................................................. 14
8.4 Device Functional Modes........................................ 14
8.5 Programming........................................................... 14
8.6 Register Maps ......................................................... 16
9 Application and Implementation ........................ 19
9.1 Application Information............................................ 19
9.2 Typical Application .................................................. 19
10 Power Supply Recommendations ..................... 23
10.1 Power-On Reset Errata......................................... 23
11 Layout................................................................... 24
11.1 Layout Guidelines ................................................. 24
11.2 Layout Example .................................................... 25
12 Device and Documentation Support ................. 26
12.1 Related Documentation......................................... 26
12.2 Receiving Notification of Documentation Updates 26
12.3 Community Resources.......................................... 26
12.4 Trademarks ........................................................... 26
12.5 Electrostatic Discharge Caution ............................ 26
12.6 Glossary ................................................................ 26
13 Mechanical, Packaging, and Orderable
Information ........................................................... 26
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision E (February 2015) to Revision F
Page
• Updated the Description section ............................................................................................................................................ 1
• Changed the Pin Configuration images.................................................................................................................................. 3
• Updated Pin Name for Pin 8 From: SC2 To: SD2 in the Pin Functions table ........................................................................ 3
• Added the Typical Characteristics section.............................................................................................................................. 9
Changes from Revision D (June 2014) to Revision E
Page
• Changed front page image. .................................................................................................................................................... 1
• Added Thermal Information. ................................................................................................................................................... 5
• Added Layout Example. ....................................................................................................................................................... 25
Changes from Revision C (June 2007) to Revision D
Page
• Added RESET Errata section. .............................................................................................................................................. 14
• Updated Typical Application schematic. .............................................................................................................................. 20
• Added Power-On Reset Errata section. .............................................................................................................................. 23
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