WIDEBAND RECEIVER. AFE8406 Datasheet

AFE8406 RECEIVER. Datasheet pdf. Equivalent

Part AFE8406
Description 8-CHANNEL WIDEBAND RECEIVER
Feature www.ti.com 1 Introduction AFE8406 14-BIT, 85 MSPS DUAL ADC, 8-CHANNEL WIDEBAND RECEIVER SLWS168C – .
Manufacture etcTI
Datasheet
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AFE8406
www.ti.com
1 Introduction
AFE8406
14-BIT, 85 MSPS DUAL ADC, 8-CHANNEL WIDEBAND RECEIVER
SLWS168C – MAY 2005 – REVISED OCTOBER 2008
1.1 FEATURES
14-Bit 85-MSPS High-Performance Dual ADC
Dual ADC Can Be Configured Into Single ADC
At fin = 140 MHz, SNR 71 dBFS,
SFDR 79 dBc
At fin = 70 MHz, SNR 73 dBFS,
SFDR 85 dBc
Independent Clocks for ADC and DDC With
Built-In FIFO
Programmable Closed Loop VGA Control With
6-Bit Outputs for Each ADC
Received Total Wideband Power (RTWP)
Measurement for the Composite Power Across
Carriers With Programmable Time Window for
Measurement
8 UMTS Digital Down Converter (DDC)
Channels or 16 CDMA/TD-SCDMA DDC
Channels With Programmable 18-Bit Filter
Coefficients
Each DDC Channel Provides:
– Real or Complex DDC Inputs
– UMTS Mode Rx Filtering: 6-Stage CIC
(m = 1 or 2), up to 40-Tap CFIR, up to
64-Tap PFIR
– CDMA Mode Rx Filtering: 6-Stage CIC
(m = 1 or 2), up to 64-Tap CFIR, up to
64-Tap PFIR
– Individual Channel Specific Power
Measurements
– A Dedicated Final AGC
Test Bus to Monitor Data at Different Stages of
the DDC Signal Path
3.3-V Analog Supplies, 1.5-V Digital Core
Supply, 3.3-V Digital I/O Supply
484-Ball Plastic BGA (23 mm × 23 mm) With
1,0-mm Pitch
Power Dissipation (Eight Active DDC
Channels): 2.7 W
1.2 APPLICATIONS
Wireless Base Station Receiver
Multi-Carrier Digital Receiver
UMTS (4 Carriers-1 Sector With Diversity)
CDMA (8 Carriers-1 Sector With Diversity)
TD-SCDMA (16 Carriers-1 Sector Without
Diversity, 8 Carriers-1-Sector With
Diversity)
Digital Radio Receivers
Wide Band Receivers
Software Radios
Wireless Local Loop
Intelligent Antenna Systems
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this document.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005–2008, Texas Instruments Incorporated



AFE8406
AFE8406
14-BIT, 85 MSPS DUAL ADC, 8-CHANNEL WIDEBAND RECEIVER
SLWS168C – MAY 2005 – REVISED OCTOBER 2008
www.ti.com
Contents
1 Introduction ............................................... 1
1.1 FEATURES ........................................... 1
1.2 APPLICATIONS ...................................... 1
2 General Description ..................................... 3
3 SPECIFICATIONS ........................................ 4
3.1 PACKAGE ORDERING INFORMATION ............. 4
3.2 ABSOLUTE MAXIMUM RATINGS ................... 4
3.3 RECOMMENDED OPERATING CONDITIONS...... 4
3.4 THERMAL CHARACTERISTICS ..................... 5
3.5 POWER DISSIPATION............................... 5
3.6 ANALOG ELECTRICAL CHARACTERISTICS ....... 5
3.7 Digital Chip DC CHARACTERISTICS................ 7
3.8 Digital Chip AC TIMING CHARACATERISTICS ..... 8
4 AFE8406 PINS........................................... 10
4.1 Analog Section Signals.............................. 10
4.2 Digital Receive Section Signals ..................... 11
4.3 Microprocessor Signals ............................. 14
4.4 JTAG Signals........................................ 15
4.5 Factory Test and No Connect Signals .............. 15
4.6 Power and Ground Signals.......................... 15
4.7 Digital Supply Monitoring............................ 16
4.8 JTAG ................................................ 16
5 Typical Characteristics................................ 17
6 ANALOG-TO-DIGITAL CONVERTERS.............. 24
6.1 ADC Operation ...................................... 24
6.2 ADC Input Configuration ............................ 24
6.3 ADC Input Voltage Over-Stress ..................... 27
6.4 ADC Reference Circuit .............................. 28
6.5 ADC Clock Input..................................... 28
7 RECEIVE DIGITAL SIGNAL PROCESSING ........ 30
7.1 Receive Input Interface.............................. 30
7.2 DDC Organization................................... 43
8 AFE8406 GENERAL CONTROL...................... 73
8.1 Microprocessor Interface Control Data, Address,
and Strobes ......................................... 73
8.2 Synchronization Signals............................. 76
8.3 Interrupt Handling ................................... 77
8.4 AFE8406 Programming ............................. 77
2 Contents
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