ICS85214I

Low Skew, 1-to-5, Differential-to-HSTL Fanout Buffer PRODUCT DISCONTINUATION NOTICE - LAST TIME BUY EXPIRES MAY 6, 2017 ICS85214I DATA SHEET GENERAL DESCRIPTION The ICS85214I is a low skew, high performance 1-to-5 Differential-to-HSTL Fanout Buffer.The CLK0, nCLK0 pair can accept most standard differential input levels. The single ended CLK1 input accepts LVCMOS or LVTTL input levels. Guaranteed output and part to part skew characteristics make the ICS85214I ideal for those clock distribution applications demanding well defined performance and repeatability. FEATURES Five differential HSTL compatible outputs Selectable differential CLK0, nCLK0 or LVCMOS/LVTTL clock inputs CLK0, nCLK0 pair can accept the following differential input levels: LVDS, LVPECL, HSTL, HCSL CLK1 can accept the following input levels: LVCMOS or LVTTL Output frequency up to 700MHz Translates any single ended input signal to HSTL levels with resistor bias on nCLK0 input Output skew: 40ps (maximum) Part-to-part skew: 300ps (maximum) Propagation delay: 1.8ns (maximum) 3.3V core, 1.8V output operating supply Available in Lead-Free (RoHS 6) package -40°C to 85°C ambient operating temperature For functional replacement part use 8523 BLOCK DIAGRAM PIN ASSIGNMENT ICS8521AGI REVISION B JUNE 3, 2016 ICS85214I 20-Lead TSSOP 6.5mm x 4.4mm x 0.92mm package body G Package Top View 1 ICS85214I Data Sheet LOW SKEW, 1-TO-5, DIFFERENTIAL-TO-HSTL FANOUT BUFFER TABLE 1. PIN DESCRIPTIONS N...