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CTLM17NS10-R3 Dataheets PDF



Part Number CTLM17NS10-R3
Manufacturers CT Micro
Logo CT Micro
Description N-Channel MOSFET
Datasheet CTLM17NS10-R3 DatasheetCTLM17NS10-R3 Datasheet (PDF)

CTLM17NS10-R3 N-Channel Enhancement MOSFET Features • Drain-Source Breakdown Voltage VDSS 100 V • Drain-Source On-Resistance RDS(ON) 3Ω, at VGS= 10V, ID= 100mA RDS(ON) 3Ω, at VGS= 4.5V, ID= 100mA ℃• Continuous Drain Current at TA=25 ID =0.17A • Advanced high cell density Trench Technology • RoHS Compliance & Halogen Free Description The CTLM17NS10-R3 is the N-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high de.

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CTLM17NS10-R3 N-Channel Enhancement MOSFET Features • Drain-Source Breakdown Voltage VDSS 100 V • Drain-Source On-Resistance RDS(ON) 3Ω, at VGS= 10V, ID= 100mA RDS(ON) 3Ω, at VGS= 4.5V, ID= 100mA ℃• Continuous Drain Current at TA=25 ID =0.17A • Advanced high cell density Trench Technology • RoHS Compliance & Halogen Free Description The CTLM17NS10-R3 is the N-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. Applications • Power Management • LCD Display inverter • DC/DC Converter • Load Switch Package Outline Schematic Drain Drain Gate Source Gate Source CT Micro Proprietary & Confidential Page 1 Rev 1 Jun, 2015 CTLM17NS10-R3 N-Channel Enhancement MOSFET Absolute Maximum Rating at 25oC Symbol Parameters VDS Drain-Source Voltage VGS Gate-Source Voltage ℃ID Continuous Drain Current @TA=25 IDM Pulsed Drain Current ℃PD Total Power Dissipation @TA=25 TSTG Storage Temperature Range TJ Operating Junction Temperature Range Thermal Characteristics Symbol Parameters RӨJA4 Thermal Resistance Junction-Ambient (t=10s) Test Conditions Test Conditions 100 ±20 0.17 0.7 0.36 -55 to 150 -55 to 150 Min Notes V V A1 A1 W2 °C °C Min Typ Max Units Notes -- 350 -- oC /W 1,4 CT Micro Proprietary & Confidential Page 2 Rev 1 Jun, 2015 CTLM17NS10-R3 N-Channel Enhancement MOSFET Electrical Characteristics TA = 25°C (unless otherwise specified) Static Characteristics Symbol Parameters BVDSS Drain-Source Breakdown Voltage IDSS Drain-Source Leakage Current IGSS Gate-Source Leakage Current Test Conditions VGS= 0V, ID= 250µA VDS = 100V, VGS = 0V VGS = ±20V, VDS = 0V Min Typ Max Units Notes 100 - - V -- 1 µA - - ±100 nA On Characteristics Symbol Parameters RDS(ON) Drain-Source On-Resistance VGS(th) Gate-Source Threshold Voltage Test Conditions VGS = 10V, ID = 100mA VGS = 4.5V, ID =100mA VGS = VDS, I ID =250µA Min Typ Max Units Notes - 3 6Ω 3 - 3 10 Ω 0.8 --- 2.8 V 3 Dynamic Characteristics Symbol Parameters CISS Input Capacitance COSS Output Capacitance CRSS Reverse Transfer Capacitance Test Conditions VGS =0V, VDS =25V f=1MHz Min Typ Max Units Notes - 42.5 - 14 - pF -3- Switching Characteristics Symbol Parameters TD(ON) Turn-On Delay Time TR Rise Time TD(OFF) Turn-Off Delay Time TF Fall Time QG Total Gate Charge QGS Gate-Source Charge QGD Gate-Drain Charge Test Conditions VDS =30V , RL= 107Ω, VGS = 10V , RG = 50Ω VDS =10V , VGS = 10V, ID = 0.22A Min Typ Max Units Notes - 5.5 - - 21.7 - 5.3 - ns - 6.4 - - 6.3 - - 1.6 - nC - 0.7 - CT Micro Proprietary & Confidential Page 3 Rev 1 Jun, 2015 CTLM17NS10-R3 N-Channel Enhancement MOSFET Drain-Source Diode Characteristics Symbol Parameters Test Conditions VSD Body Diode Forward Voltage VGS = 0V, ID = 0.34A ISD Body Diode Continuous Current Note: ℃1. The power dissipation is limited by 150 junction temperature. 2. Device mounted on a glass-epoxy board Min Typ Max Units Notes - 0.9 1.3 V - - 0.25 A 1 FR-4 25.4 × 25.4 mm . 2 Oz Copper Actual Size 3. The data tested by pulsed , pulse width ≦ 300µs , duty cycle ≦ 2% 4. Thermal Resistance follow JESD51-3. CT Micro Proprietary & Confidential Page 4 Rev 1 Jun, 2015 Typical Characteristic Curves CTLM17NS10-R3 N-Channel Enhancement MOSFET CT Micro Proprietary & Confidential Page 5 Rev 1 Jun, 2015 CTLM17NS10-R3 N-Channel Enhancement MOSFET CT Micro Proprietary & Confidential Page 6 Rev 1 Jun, 2015 CTLM17NS10-R3 N-Channel Enhancement MOSFET Test Circuits & Waveforms Figure 9: Gate Charge Test Circuit Figure 10: Gate Charge Waveform Figure 11: Switching Time Test Circuit Figure 12: Switching Time Waveform CT Micro Proprietary & Confidential Page 7 Rev 1 Jun, 2015 Package Dimension (SC-59) CTLM17NS10-R3 N-Channel Enhancement MOSFET Note: Dimensions in mm Recommended pad layout for surface mount leadform Note: Dimensions in mm CT Micro Proprietary & Confidential Page 8 Rev 1 Jun, 2015 Marking Information CTLM17NS10-R3 N-Channel Enhancement MOSFET B710A B710A: Device Number Ordering Information Part Number CTLM17NS10-R3 Description SC-59 Reel Quantity 3000 pcs CT Micro Proprietary & Confidential Page 9 Rev 1 Jun, 2015 Reflow Profile CTLM17NS10-R3 N-Channel Enhancement MOSFET Profile Feature Temperature Min. (Tsmin) Temperature Max. (Tsmax) Time (ts) from (Tsmin to Tsmax) Ramp-up Rate (tL to tP) Liquidous Temperature (TL) Time (tL) Maintained Above (TL) Peak Body Package Temperature Time (tP) within 5°C of 260°C Ramp-down Rate (TP to TL) Time 25°C to Peak Temperature Pb-Free Assembly Profile 150°C 200°C 60-120 seconds 3°C/second max. 217°C 60 – 150 seconds 260°C +0°C / -5°C 30 seconds 6°C/second max 8 minutes max. CT Micro Proprietary & Confidential Page 10 Rev 1 Jun, 2015 CTLM17NS10-R3 .


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