CTH5002NS-T52

CTH5002NS-T52 N-Channel Enhancement MOSFET Features  Drain-Source Breakdown Voltage VDSS 25V  Drain-Source On-Resistance RDS(ON) 6.5m, at VGS= 10V, ID= 30A RDS(ON) 10m, at VGS= 4.5V, ID= 30A  Continuous Drain Current at TC=25℃ID =50A  Advanced high cell density Trench Technology  RoHS Compliance & Halogen Free Description The CTH5002NS-T52 is the N-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application. Applications  DC/DC Converter  Load Switch  LCD Display inverter  Power Management  Package Outline Schematic Drain Gate Source Drain Gate Source CT Micro Proprietary & Confidential Page 1 Rev 3 Jun, 2015 CTH5002NS-T52 N-Channel Enhancement MOSFET Absolute Maximum Rating at 25oC Symbol Parameters VDS Drain-Source Voltage VGS Gate-Source Voltage ID Continuous Drain Current @TC=25℃ IDM Pulsed Drain Current PD Total Power Dissipation @TC=25℃ TSTG Storage Temperature Range TJ Operating Junction Temperature Range Thermal Characteristics Symbol Parameters RӨJC Thermal Resistance Junction-Case Test Conditions Test Conditions 25 ±20 50 100 50 -55 to 150 -55 to 150 Min Note Vs V A1 A1 W2 °C °C Min Typ Max Units Notes -- -- 20 oC /W 1,4 CT Micro Proprietary & Confidential Page 2 Rev 3 Jun, 2015 CTH5002NS-T52 N-Channel Enhancem...