9FGV1005C

Low Phase-Noise, Low-Power Programmable PhiClock™ Generator 9FGV1005C Datasheet Description The 9FGV1005C is a member of the Renesas PhiClock™ programmable clock generator family. The 9FGV1005C provides two copies of a single non-spread spectrum output frequency and one copy of the crystal reference input. Two select pins allow for hardware selection of the desired configuration, or two I2C bits allow easy software selection of the desired configuration. The user may configure any one of the four OTP configurations as the default when operating in I2C mode. Four unique I2C addresses are available, allowing easy I2C access to multiple components. Typical Applications ▪ HPC ▪ Storage ▪ 10G/25G Ethernet ▪ Fiber Optic Modules ▪ SSDs ▪ NVLink Output Features ▪ 1 integer output frequency per configuration ▪ 2 programmable output pairs plus 1 LVCMOS REF output ▪ 1MHz–325MHz LVDS or LP-HCSL outputs ▪ 1MHz–200MHz LVCMOS outputs Block Diagram Features ▪ 1.8V–3.3V operation ▪ Individual 1.8V–3.3V VDDO for each programmable output pair ▪ Supports HCSL, LVDS and LVCMOS I/O standards ▪ Supports LVPECL and CML logic with easy AC coupling – see application note AN-891 for alternate terminations ▪ HCSL utilizes Renesas' LP-HCSL technology for improved performance, lower power and higher integration: Programmable output impedance of 85Ω or 100Ω ▪ On-board OTP supports up to 4 complete configurations ▪ Configuration selected via strapping pins or I2C ▪ < 100mW at 1.8V, < 200mW at 3.3V (LP-...