9ZML1233E

2:12 DB1200ZL Derivative for PCIe Gen1-4 and UPI 9ZML1233E/9ZML1253E Datasheet Description The 9ZML1233E/9ZML1253E are second generation enhanced performance DB1200ZL derivatives. The parts are pin-compatible upgrades to the 9ZML1232B, while offering much improved phase jitter performance. A fixed external feedback maintains low drift for critical QPI/UPI applications, while each input channel has software adjustable input-to-output delay to ease transport delay management for today's more complex server topologies. The 9ZML1233E and 9ZML1253E have an SMBus Write Lockout pin for increased device and system security. PCIe Clocking Architectures ▪ Common Clocked (CC) ▪ Independent Reference (IR) with and without spread spectrum Typical Applications ▪ Servers ▪ Storage ▪ Networking ▪ SSDs Output Features ▪ 12 Low-Power (LP) HCSL output pairs (1233E) ▪ 12 Low-Power (LP) HCSL output pairs with 85Ω Zout (1253E) Block Diagram Features ▪ SMBus write lock feature; increases system security ▪ 2 software-configurable input-to-output delay lines; manage transport delay for complex topologies ▪ LP-HCSL outputs; eliminate 24 resistors, save 41mm2 of area (1233E) ▪ LP-HCSL outputs with 85Ω Zout; eliminate 48 resistors, save 82mm2 of area (1253E) ▪ 12 OE# pins; hardware control of each output ▪ 3 selectable SMBus addresses; multiple devices can share same SMBus segment ▪ Selectable PLL bandwidths; minimizes jitter peaking in cascaded PLL topologies ▪ Hardware/SMBus control of PLL bandwidt...