Document
HIP1012A
Dual Power Distribution Controller
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DATASHEET
FN4419 Rev 6.00 March 2004
The HIP1012A is a HOT SWAP dual supply power distribution controller. Two external N-Channel MOSFETs are driven to distribute power while providing load fault isolation.
At turn-on, the gate of each external N-Channel MOSFET is charged with a 10A current source. Capacitors on each gate (see the Typical Application Diagram), create a programmable ramp (soft turn-on) to control inrush currents. A built in charge pump supplies the gate drive for the 12V supply N-Channel MOSFET switch.
Overcurrent protection is facilitated by two external current sense resistors. When the current through either resistor exceeds the user programmed value the controller enters the current regulation mode. The time-out capacitor, CTIM, starts charging as the controller enters the time out period. Once CTIM charges to a 2V threshold, the N-Channel MOSFETs are latched off. In the event of a fault at least three times the current limit level, the N-Channel MOSFET gates are pulled low immediately before entering time out period. The controller is reset by a rising edge on either PWRON pin.
Choosing the voltage selection mode the HIP1012 controls either +12V/5V or +3.3V/+5V supplies.
Ordering Information
PART NUMBER
TEMP. RANGE (°C)
PACKAGE
PKG. DWG. #
HIP1012ACB
-0 to 70 14 Ld SOIC
M14.15
HIP1012ACBZA (Note) -0 to 70 14 Ld SOIC( Pb-free) M14.15
NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which is compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J Std-020B.
Features
• HOT SWAP Dual Power Distribution Control for +5V and +12V or +5V and +3.3V
• Provides Fault Isolation • Programmable Current Regulation Level • Programmable Time Out • Charge Pump Allows the Use of N-Channel MOSFETs • Power Good and Overcurrent Latch Indicators • Enhanced Overcurrent Sensitivity Available • Redundant Power On Controls • Adjustable Turn-On Ramp • Protection During Turn-On • Two Levels of Current Limit Detection Provide Fast
Response to Varying Fault Conditions • Less Than 1s Response Time to Dead Short • 3s Response Time to 200% Current Overshoot • Pb-Free Package Option • Tape & Reel Packaging with ‘-T’ Part Number Suffix
Applications
• Redundant Array of Independent Disks (RAID) System • Power Distribution Control • Hot Plug, Hot Swap Components
Pinout
HIP1012A (SOIC) TOP VIEW
3/12VS
3/12VG
VDD MODE/ PWRON1 PWRON2
5VG
5VS
1 2 3 4 5 6 7
14 3/12VISEN 13 RILIM 12 GND 11 CPUMP 10 CTIM 9 PGOOD 8 5VISEN
Typical Application Diagram
OPTIONAL VDD RFILTER
CFILTER
CPUMP
RSENSE
12V
RGATE
HIP1012A
CGATE
POWER ON INPUTS
3/12VS 3/12VISEN
3/12VG VDD M/PON1
RILIM GND
CPUMP
PWRON2
CTIM
5V
RGATE 5VG 5VS
PGOOD 5ISEN
CGATE
RSENSE
RLOAD RILIM
CTIM 5V OR 3.3V
RLOAD
FN4419 Rev 6.00 March 2004
Page 1 of 15
FN4419 Rev 6.00 March 2004
Page 2 of 15
Simplified Block Diagram
12VIN
CGATE 20 OPTIONAL VDD RFILTER
CFILTER 20 CGATE
5VIN
RSENSE
TO LOAD
12VS
12VG
VDD
18V
10µA
OC CLIM
R
FALLING EDGE DELAY ENABLE
+ -
2R
+-
3X
18V
PWRON1
RISING EDGE RESET
R QN R SQ
ENABLE
PWRON2 12V
5VG
10µA
ENABLE FALLING
EDGE DELAY
3X +-
CLIM +
12V 2R
OC R 5VS
HIP1012A
RSENSE
12V 100µA
12ISEN
RILIM
POR
GND
QPUMP
12V 10µA
CPUMP
RILIM
CPUMP
TO VDD
++
2V -
PGOOD
CTIM
CTIM
PGOOD
OC LATCH
5ISEN
OPTIONAL
TO LOAD
HIP1012A
HIP1012A
Pin Descriptions
PIN # SYMBOL
FUNCTION
DESCRIPTION
1 3V/12VS 3.3 V/12V Source
Connect to source of associated external N-Channel MOSFET switch to sense output voltage.
2 3V/12VG 3.3V/12V Gate
Connect to the gate of associated N-Channel MOSFET switch. A capacitor from this node to ground sets the turn-on ramp. At turn-on this capacitor will be charged to 17.4V by a 10A current source when in 5v/12V mode of operation, otherwise capacitor will be charged to 11.4V. A small resistor (10 - 200) should be placed in series with the gate capacitor to ground to prevent current oscillations.
3
VDD
Chip Supply
Connect to 12V supply. This can be either connected directly to the +12V rail supplying the load voltage or to a dedicated VDD +12V supply. If the former is chosen special attention to VDD decoupling must be paid.
4
MODE/
Power ON/ Reset
PWRON1 and PWRON2 are used to turn-on and reset the chip. Both outputs turn-on when
PWRON1 Invokes 3.3V operation
either pin is driven low. After a current limit time out, the chip is reset by the rising edge of a
when shorted to VDD, pin 3. reset signal applied to either PWRON pin. Each input has 100A pull up capability which is
co.