Document
NUC970
ARM® ARM926EJ-S Based 32-bit Microprocessor
NUC970 SERIES DATASHEET
NUC970 Series Datasheet
The information described in this document is the exclusive intellectual property of Nuvoton Technology Corporation and shall not be reproduced without permission from Nuvoton. Nuvoton is providing this document only for reference purposes of ARM926EJ-S based system design.
Nuvoton assumes no responsibility for errors or omissions. All data and specifications are subject to change without notice. For additional information or questions, please contact: Nuvoton Technology Corporation.
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Sept., 07, 2021
Page 1 of 91
Rev 1.53
NUC970
Table of Contents List of Figures ......................................................................................... 7 List of Tables .......................................................................................... 8 1 GENERAL DESCRIPTION .................................................................. 9 2 FEATURES ....................................................................................... 10
1.1 NUC970 Series Features ......................................................................10
3 PARTS INFORMATION LIST AND PIN CONFIGURATION .............. 17
3.1 NUC970 Series Part Number Naming Guide ................................................17 3.2 NUC970 Series Part Selection Guide .........................................................18 3.3 Pin Configuration .................................................................................19
3.3.1 NUC972DFxxYC Pin Diagram....................................................................... 19 3.3.2 NUC975DKxxYC Pin Diagram ...................................................................... 20 3.3.3 NUC976DKxxYC Pin Diagram ...................................................................... 21 3.3.4 NUC977DKxxYC Pin Diagram ...................................................................... 22
3.4 Pin Description....................................................................................23
4 BLOCK DIAGRAM ............................................................................ 43
4.1 NUC970 Series Block Diagram ................................................................43
5 FUNCTIONAL DESCRIPTION .......................................................... 44
5.1 ARM® ARM926EJ-S CPU Core ................................................................44
5.1.1 Overview ................................................................................................ 44
5.2 System Manager .................................................................................45
5.2.1 Overview ................................................................................................ 45
5.3 Clock Controller (CLK_CTL)....................................................................45
5.3.1 Overview ................................................................................................ 45 5.3.2 Features ................................................................................................. 45
5.4 Advanced Interrupt Controller (AIC) ...........................................................45
5.4.1 Overview ................................................................................................ 45 5.4.2 Features ................................................................................................. 46
5.5 SDRAM Interface Controller (SDIC)...........................................................46
5.5.1 Overview ................................................................................................ 46 5.5.2 Features ................................................................................................. 47
5.6 MTP Controller (MTP) ...........................................................................47
5.6.1 Overview ................................................................................................ 47
Sept., 07, 2021
Page 2 of 91
Rev 1.53
NUC970 SERIES DATASHEET
NUC970
5.6.2 Features ................................................................................................. 47
5.7 External Bus Interface (EBI) ....................................................................47
5.7.1 Overview ................................................................................................ 47 5.7.2 Features ................................................................................................. 47
5.8 General Purpose I/O (GPIO) ...................................................................47
5.8.1 Overview ................................................................................................ 48 5.8.2 Features ................................................................................................. 48
5.9 General DMA Controller (GDMA) ..............................................................48
5.9.1 Overview ..............................