853S058

8:1 Differential-to-3.3V or 2.5V LVPECL/ECL Clock Multiplexer 853S058 DATA SHEET General Description The 853S058 is an 8:1 Differential-to-3.3V or 2.5V LVPECL / ECL Clock Multiplexer which can operate up to 2.5 GHz. The 853S058 has 8 differential selectable clock inputs. The PCLK, nPCLK input pairs can accept LVPECL, LVDS, SSTL or CML levels. The fully differential architecture and low propagation delay make it ideal for use in clock distribution circuits. The select pins have internal pulldown resistors. The SEL2 pin is the most significant bit and the binary number applied to the select pins will select the same numbered data input (i.e., 000 selects PCLK0, nPCLK0). Block Diagram PCLK0 Pulldown nPCLK0 Pullup/Pulldown PCLK1 Pulldown nPCLK1 Pullup/Pulldown PCLK2 Pulldown nPCLK2 Pullup/Pulldown PCLK3 Pulldown nPCLK3 Pullup/Pulldown PCLK4 Pulldown nPCLK4 Pullup/Pulldown PCLK5 Pulldown nPCLK5 Pullup/Pulldown PCLK6 Pulldown nPCLK6 Pullup/Pulldown PCLK7 Pulldown nPCLK7 Pullup/Pulldown 000 (default) 001 010 011 100 101 110 111 Q nQ Features High speed 8:1 differential muliplexer One differential 3.3V or 2.5V LVPECL output pair Eight selectable differential PCLKx, nPCLKx input pairs Differential PCLKx, nPCLKx pairs can accept the following interface levels: LVPECL, LVDS, SSTL,CML Maximum output frequency: 2.5GHz Translates any single ended input signal to LVPECL levels with resistor bias on nPCLKx input Additive phase jitter, RMS: 0.075ps (typical) Part-to-par...