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ICS950201

Renesas

Programmable Timing Controller

DATASHEET Programmable Timing Control HubTM for P4TM ICS950201 Recommended Application: CK-408 clock for Intel® 845 c...


Renesas

ICS950201

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Description
DATASHEET Programmable Timing Control HubTM for P4TM ICS950201 Recommended Application: CK-408 clock for Intel® 845 chipset with P4 processor. Output Features: 3 Differential CPU Clock Pairs @ 3.3V 7 PCI (3.3V) @ 33.3MHz 3 PCI_F (3.3V) @ 33.3MHz 1 USB (3.3V) @ 48MHz 1 DOT (3.3V) @ 48MHz 1 REF (3.3V) @ 14.318MHz 5 3V66 (3.3V) @ 66.6MHz 1 VCH/3V66 (3.3V) @ 48MHz or 66.6MHz Features: Supports spread spectrum modulation, down spread 0 to -0.5%. Efficient power management scheme through PD#, CPU_STOP# and PCI_STOP#. Uses external 14.318MHz crystal Stop clocks and functional control available through I2C interface. Key Specifications: CPU Output Jitter <150ps 3V66 Output Jitter <250ps CPU Output Skew <100ps, programmable over 800 ps with groups CPU0,1 and CPU2. Frequency Table FS2 FS1 FS0 CPU (MHz) 3V66 (MHz) 66Buff[2:0] 3V66[4:2] (MHz) PCI_F PCI (MHz) 0 0 0 66.66 66.66 66.66 33.33 0 0 1 100.00 66.66 66.66 33.33 0 1 0 200.00 66.66 66.66 33.33 0 1 1 133.33 66.66 66.66 33.33 Mid 0 0 Tristate Tristate Tristate Tristate Mid 0 1 TCLK/2 TCLK/4 TCLK/4 TCLK/8 Mid 1 0 Reserved Reserved Reserved Reserved Mid 1 1 Reserved Reserved Reserved Reserved Pin Configuration 56-Pin SSOP & TSSOP * These inputs have 150K internal pull-up resistor to VDD. IDTTM Programmable Timing Control HubTM for P4TM 1 460J—01/25/10 ICS950201 Programmable Timing Control HubTM for P4TM Block Diagram IDTTM Programmable Timing Control HubTM for P4TM 2 460J—0...




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