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ICS651 Dataheets PDF



Part Number ICS651
Manufacturers Renesas
Logo Renesas
Description LOW SKEW 1 TO 4 CLOCK BUFFER
Datasheet ICS651 DatasheetICS651 Datasheet (PDF)

LOW SKEW 1 TO 4 CLOCK BUFFER DATASHEET ICS651 Description The ICS651 is a low skew, single input to four output, clock buffer. Part of IDT’s ClockBlocksTM family, this is a low skew, small clock buffer. IDT makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs. Features • Low skew outputs (250 ps) • Packaged in 8-pin SOIC • RoHS 6 compliant package • Low power CMOS technology • Operating Voltages.

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LOW SKEW 1 TO 4 CLOCK BUFFER DATASHEET ICS651 Description The ICS651 is a low skew, single input to four output, clock buffer. Part of IDT’s ClockBlocksTM family, this is a low skew, small clock buffer. IDT makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs. Features • Low skew outputs (250 ps) • Packaged in 8-pin SOIC • RoHS 6 compliant package • Low power CMOS technology • Operating Voltages of 1.5 V to 2.5 V • Output Enable pin tri-states outputs • 3.3 V tolerant input clock • Industrial or commercial temperature ranges Block Diagram ICLK Q0 Q1 Q2 Q3 Output Enable IDT® LOW SKEW 1 TO 4 CLOCK BUFFER 1 ICS651 REV H 101111 ICS651 LOW SKEW 1 TO 4 CLOCK BUFFER Pin Assignment ICLK Q1 Q2 Q3 1 2 3 4 8 OE 7 VDD 6 GND 5 Q4 FAN OUT BUFFER Pin Descriptions Pin Number 1 2 3 4 5 6 7 8 Pin Name ICLK Q1 Q2 Q3 Q4 GND VDD OE Pin Type Input Output Output Output Output Power Power Input Pin Description Clock Input. 3.3 V tolerant input. Clock Output 1. Clock Output 2. Clock Output 3. Clock Output 4. Connect to ground. Connect to +1.5 V or +2.5 V. Output Enable. Tri-states outputs when low. Connect to VDD for normal operation. External Components A minimum number of external components are required for proper operation. A decoupling capacitor of 0.01 μF should be connected between VDD on pin 7 and GND on pin 6, as close to the device as possible. A 33 Ω series terminating resistor may be used on each clock output if the trace is longer than 1 inch. To achieve the low output skew that the ICS651 is capable of, careful attention must be paid to board layout. Essentially, all four outputs must have identical terminations, identical loads and identical trace geometries. If they do not, the output skew will be degraded. For example, using a 30Ω series termination on one output (with 33Ω on the others) will cause at least 15 ps of skew. IDT® LOW SKEW 1 TO 4 CLOCK BUFFER 2 ICS651 REV H 101111 ICS651 LOW SKEW 1 TO 4 CLOCK BUFFER FAN OUT BUFFER Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS651. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Supply Voltage, VDD Output Enable and All Outputs ICLK Ambient Operating Temperature (industrial) Ambient Operating Temperature (commercial) Storage Temperature Junction Temperature Soldering Temperature Rating 7V -0.5 V to VDD+0.5 V -0.5 V to 3.6 V (VDD > 0V) -40 to +85 ° C 0 to +70 ° C -65 to +150° C 125° C 260° C Recommended Operation Conditions Parameter Ambient Operating Temperature (industrial) Ambient Operating Temperature (commercial) Power Supply Voltage (measured in respect to GND) Min. -40 0 +1.425 Typ. Max. +85 +70 +2.625 Units °C °C V IDT® LOW SKEW 1 TO 4 CLOCK BUFFER 3 ICS651 REV H 101111 ICS651 LOW SKEW 1 TO 4 CLOCK BUFFER FAN OUT BUFFER DC Electrical Characteristics VDD=1.5 V ±5%, Ambient temperature -40 to +85° C or 0 to +70° C, unless stated otherwise Parameter Symbol Conditions Min. Typ. Max. Operating Voltage VDD 1.425 1.575 Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Operating Supply Current VIH Note 1, ICLK, OE 1.17 3.6 VIL Note 1, ICLK, OE 0.63 VOH IOH = -6 mA 1.35 VOL IOL = 6 mA 0.45 IDD No load, 133 MHz 25 Nominal Output Impedance ZO Input Capacitance CIN ICLK, OE pin Short Circuit Current IOS Notes: 1. Nominal switching threshold is VDD/2 20 5 ±28 Units V V V V V mA Ω pF mA VDD=1.8 V ±5%, Ambient temperature -40 to +85° C or 0 to +70° C, unless stated otherwise Parameter Symbol Conditions Min. Typ. Max. Operating Voltage VDD 1.71 1.8 1.89 Input High Voltage, ICLK Input Low Voltage, ICLK Output High Voltage Output Low Voltage Operating Supply Current VIH Note 1, ICLK, OE 1.17 3.6 VIL Note 1, ICLK, OE 0.63 VOH IOH = -8 mA 1.35 VOL IOL = 8mA 0.45 IDD No load, 133 MHz 30 Nominal Output Impedance ZO Input Capacitance CIN ICLK, OE pin Short Circuit Current IOS Notes: 1. Nominal switching threshold is VDD/2 20 5 ±32 Units V V V V V mA Ω pF mA VDD=2.5 V ±5%, Ambient temperature -40 to +85° C or 0 to +70° C, unless stated otherwise Parameter Symbol Conditions Min. Typ. Max. Operating Voltage VDD 2.375 2.625 Input High Voltage, ICLK Input Low Voltage, ICLK Output High Voltage Output Low Voltage Operating Supply Current VIH Note 1, ICLK, OE 1.7 3.6 VIL Note 1, ICLK, OE 0.7 VOH IOH = -8 mA 2 VOL IOL = 8mA 0.4 IDD No load, 133 MHz 50 Nominal.


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