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AD7545 Dataheets PDF



Part Number AD7545
Manufacturers Intersil Corporation
Logo Intersil Corporation
Description 12-Bit/ Buffered/ Multiplying CMOS DAC
Datasheet AD7545 DatasheetAD7545 Datasheet (PDF)

AD7545 August 1997 12-Bit, Buffered, Multiplying CMOS DAC Description The AD7545 is a low cost monolithic 12-bit, CMOS multiplying DAC with on-board data latches. Data is loaded in a single 12-bit wide word which allows interfacing directly to most 12-bit and 16-bit bus systems. Loading of the input latches is under the control of the CS and WR inputs. A logic low on these control inputs makes the input latches transparent allowing direct unbuffered operation of the DAC. Features • 12-Bit Reso.

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AD7545 August 1997 12-Bit, Buffered, Multiplying CMOS DAC Description The AD7545 is a low cost monolithic 12-bit, CMOS multiplying DAC with on-board data latches. Data is loaded in a single 12-bit wide word which allows interfacing directly to most 12-bit and 16-bit bus systems. Loading of the input latches is under the control of the CS and WR inputs. A logic low on these control inputs makes the input latches transparent allowing direct unbuffered operation of the DAC. Features • 12-Bit Resolution • Low Gain T.C. 2ppm/oC (Typ) • Fast TTL/CMOS Compatible Data Latches • Single +5V to +15V Supply • Low Power • Low Cost • /883 Processed Versions Available Ordering Information PART NUMBER AD7545JN AD7545KN AD7545AN AD7545BN TEMP. RANGE (oC) 0 to 70 0 to 70 -40 to 85 -40 to 85 PACKAGE 20 Ld PDIP 20 Ld PDIP 20 Ld PDIP 20 Ld PDIP PKG. NO. E20.3 E20.3 E20.3 E20.3 Pinout AD7545 (PDIP) TOP VIEW Functional Diagram RFB 20 AD7545 R OUT 1 AGND DGND 1 2 3 4 5 6 7 8 9 20 RFB 19 VREF 18 VDD 17 WR 16 CS 15 DB0 (LSB) 14 DB1 13 DB2 12 DB3 11 DB4 DB11 - DB0 (PINS 4 - 15) CS 16 12 WR 17 INPUT DATA LATCHES 3 DGND 12 18 VDD VREF 19 12-BIT MULTIPLYING DAC 1 2 OUT1 AGND DB11 (MSB) DB10 DB9 DB8 DB7 DB6 DB5 10 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 File Number 3108.1 10-10 AD7545 Absolute Maximum Ratings Supply Voltage (VDD to DGND) . . . . . . . . . . . . . . . . . . . -0.3V, +17V Digital Input Voltage to DGND . . . . . . . . . . . . . . . .-0.3V, VDD +0.3V VRFB , VREF to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25V VPIN1 to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3V, VDD +0.3V AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3V, VDD +0.3V Thermal Information Thermal Resistance (Typical, Note 1) θJA (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 Maximum Junction Temperature (PDIP Package) . . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC Operating Conditions Temperature Ranges Commercial (J, K, Grades) . . . . . . . . . . . . . . . . . . . . .0oC to 70oC Industrial (A, B, Grades) . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC Extended (S Grades) . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications PARAMETER STATIC PERFORMANCE Resolution Relative Accuracy J, A, S K, B Differential Nonlinearity TA = See Note 2, VREF = +10V, VOUT1 = 0V, AGND = DGND, Unless Otherwise Specified VDD = +5V TEST CONDITIONS MIN TYP MAX MIN VDD = +15V TYP MAX UNITS 12 ±2 ±1 ±4 ±1 ±20 ±10 12 ±2 ±1 ±4 ±1 ±25 ±15 Bits LSB LSB LSB LSB LSB LSB J, A, S 10-Bit Monotonic TMIN to TMAX K, B 12-Bit Monotonic TMIN to TMAX J, A, S DAC Register Loaded with 1111 1111 1111 K, B Gain Error is Adjustable Using the Circuits of Figures 4 and 5 (Note 3) Typical Value is 2ppm/oC for VDD = +5V (Note 4) ∆VDD = ±5% J, K A, B S DB0 - DB11 = 0V; WR, CS = 0V (Note 2) Gain Error (Using Internal RFB) Gain Temperature Coefficient ∆Gain/∆Temperature DC Supply Rejection ∆Gain/∆VDD Output Leakage Current at OUT1 0.015 - - ±5 0.03 50 50 200 0.01 - - ±10 0.02 50 50 200 ppm/oC % nA nA nA µs DYNAMIC CHARACTERISTICS Current Setting Time To 1/2 LSB, OUT1 LOAD = 100Ω , DAC Output Measured from Falling Edge of WR, CS = 0V (Note 4) 2 2 Propagation Delay from Digital Input OUT1 LOAD = 100Ω, Change to 90% of Final Analog CEXT = 13pF (Notes 4 and 5) Output Digital to Analog Glitch Impulse AC Feedthrough at OUT1 ANALOG OUTPUTS Output Capacitance COUT1 COUT1 DB0 - DB11 = 0V, WR, CS = 0V (Note 4) DB0 - DB11 = VDD , WR, CS = 0V (Note 4) VREF = AGND VREF = ±10V, 10kHz Sinewave (Note 6) - - 300 - - 250 ns - 400 5 - - 250 5 - nV/s mVP-P - - 70 200 - - 70 200 pF pF 10-11 AD7545 Electrical Specifications PARAMETER REFERENCE INPUT Input Resistance (Pin 19 to GND) Input Resistance TC = -300ppm/oC (Typ) Typical Input Resistance = 11kΩ DIGITAL INPUTS Input High Voltage, VIH Input Low Voltage, VIL Input Current, IIN Input Capacitance DB0 - DB11 WR, CS VIN = 0 or VDD (Note 7) VIN = 0 (Note 4) VIN = 0 (Note 4) 2.4 ±1 0.8 ±10 7 20 ±1 13.5 1.5 ±10 7 20 V V µA (Max) pF pF 7 25 7 25 kΩ kΩ TA = See Note 2, VREF = +10V, VOUT1 = 0V, AGND = DGND, Unless Otherwise Specified (Continued) VDD = +5V TEST CONDITIONS MIN TYP MAX MIN VDD = +15V TYP MAX UNITS SWITCHING CHARACTERISTICS (Note 4) Chip Select to Write Setup Ti.


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