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IFNU235 Dataheets PDF



Part Number IFNU235
Manufacturers InterFET
Logo InterFET
Description Dual Matched N-Channel JFET
Datasheet IFNU235 DatasheetIFNU235 Datasheet (PDF)

InterFET Product Folder Technical Support Order Now IFNU234-5 IFNU234, IFNU235 Dual Matched N-Channel JFET Features • InterFET N0016H Geometry • Low Leakage: 10 pA Typical • Low Input Capacitance: 3.5 pF Typical • High Input Impedance • Replacement for U234, U235 • RoHS Compliant • SMT, TH, and Bare Die Package options. Applications • Low Noise Differential Amplifier • Differential Amplifier • Wide-Band Amplifier Description The -50V InterFET IFNU234, and IFNU235 JFET’s are targeted for lo.

  IFNU235   IFNU235


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InterFET Product Folder Technical Support Order Now IFNU234-5 IFNU234, IFNU235 Dual Matched N-Channel JFET Features • InterFET N0016H Geometry • Low Leakage: 10 pA Typical • Low Input Capacitance: 3.5 pF Typical • High Input Impedance • Replacement for U234, U235 • RoHS Compliant • SMT, TH, and Bare Die Package options. Applications • Low Noise Differential Amplifier • Differential Amplifier • Wide-Band Amplifier Description The -50V InterFET IFNU234, and IFNU235 JFET’s are targeted for low noise differential amplifier designs. Gate leakages are less than 10pA at room temperatures. The TO-71 package is hermetically sealed and suitable for military applications. Custom specifications, matching, and packaging options are available. TO-71 Bottom View Source 5 6 Drain Gate 3 7 Gate Drain 2 1 Source Gate 1 Drain 2 Source 3 Gate 4 SOIC8 Top View 8 Gate 7 Source 6 Drain 5 Gate Product Summary Parameters BVGSS Gate to Source Breakdown Voltage IDSS Drain to Source Saturation Current VGS(off) Gate to Source Cutoff Voltage GFS Forward Transconductance IFNU234 Min -50 0.5 -0.5 0.6 Ordering Information Custom Part and Binning Options Available Part Number Description IFNU234; IFNU235 Through-Hole SMPU234; SMPU235 Surface Mount 7“ Tape and Reel: Max 500 Pieces SMPU234TR; SMPU235TR 13” Tape and Reel: Max 2,500 Pieces IFNU234COT; IFNU235COT * Chip Orientated Tray (COT Waffle Pack) IFNU234CFT; IFNU235CFT * Chip Face-up Tray (CFT Waffle Pack) * Bare die packaged options are designed for matched specifications but not 100% tested IFNU235 Min Unit -50 V 0.5 mA -0.5 V 0.6 mS Case TO-71 SOIC8 SOIC8 COT CFT Packaging Bulk Bulk Minimum 500 Pieces Tape and Reel 70/Waffle Pack 70/Waffle Pack Disclaimer: It is the Buyers responsibility for designing, validating and testing the end application under all field use cases and extreme use conditions. Guaranteeing the application meets required standards, regulatory compliance, and all safety and security requirements is the responsibility of the Buyer. These resources are subject to change without notice. IF35103.R00 InterFET Product Folder Technical Support Electrical Characteristics Maximum Ratings (@ TA = 25°C, Unless otherwise specified) Parameters VRGS Reverse Gate Source and Gate Drain Voltage IFG Continuous Forward Gate Current PD Continuous Device Power Dissipation P Power Derating TJ Operating Junction Temperature TSTG Storage Temperature Static Characteristics (@ TA = 25°C, Unless otherwise specified) V(BR)GSS IGSS VGS(OFF) VGS IDSS IG Parameters Gate to Source Breakdown Voltage Gate to Source Reverse Current Gate to Source Cutoff Voltage Gate to Source Voltage Drain to Source Saturation Current Gate Current Conditions VDS = 0V, IG = -1μA VGS = -30V, VDS = 0V, TA = 25°C VGS = -30V, VDS = 0V, TA = 150°C VDS = 20V, ID = 1nA VDS = 20V, ID = 200μA VDS = 20V, VGS = 0V (Pulsed) VDS = 20V, ID = 200μA, TA = 25°C VDS = 20V, ID = 200μA, TA = 125°C Dynamic Characteristics (@ TA = 25°C, Unless otherwise specified) Parameters Conditions GFS Forward Transconductance VDS = 20V, ID = 200μA, f = 1kHz GOS Output Conductance VDS = 20V, ID = 200μA, f = 1kHz Ciss Input Capacitance Crss Reverse Transfer Capacitance en Equivalent Circuit Input Noise Voltage Differential Gate VGS1 − VGS2 Source Voltage Differential Gate VGS1−VGS2 ∆T Source Voltage with Temperature VDS = 20V, VGS = 0V, f = 1MHz VDS = 20V, VGS = 0V, f = 1MHz VDS = 20V, VGS = 0V, f = 100Hz VDS = 20V, ID = 200μA VDS = 20V, ID = 200μA, TA = -55°C, TB = 25°C, TC = 125°C IFNU234 IFNU235 IFNU234 IFNU235 Order Now IFNU234-5 Value -50 50 300 4.3 -55 to 125 -65 to 150 Unit V mA mW mW/°C °C °C IFNU234, IFNU235 Min Max Unit -50 V -100 pA -500 nA -0.5 -4.5 V -0.3 -4 V 0.5 5 -50 pA -250 nA IFNU234, IFNU235 Min Max 0.6 1.6 10 6 2 80 20 25 5 5 Unit mS μS pF pF nV/√Hz mV mV/°C IFNU234-5 Document Number: IF35103.R00 2 of 4 www.InterFET.com InterFET Corporation December, 2018 InterFET Product Folder Technical Support Order Now SOIC8 Mechanical and Layout Data Package Outline Data IFNU234-5 Suggested Pad Layout 1. All linear dimensions are in millimeters. 2. Package weight approximately 0.21 grams 3. Molded plastic case UL 94V-0 rated 4. For Tape and Reel specifications refer to InterFET CTC-021 Tape and Reel Specification, Document number: IF39002 5. Bulk product is shipped in standard ESD shipping material 6. Refer to JEDEC standards for additional information. IFNU234-5 Document Number: IF35103.R00 1. All linear dimensions are in millimeters. 2. The suggested land pattern dimensions have been provided for reference only. A more robust pattern may be desired for wave soldering. 3 of 4 www.InterFET.com InterFET Corporation December, 2018 InterFET Product Folder Technical Support Order Now TO-71 Mechanical and Layout Data Package Outline Data IFNU234-5 Suggested Bent.


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