DC/DC Controller. TPS5120-EP Datasheet

TPS5120-EP Controller. Datasheet pdf. Equivalent

TPS5120-EP Datasheet
Recommendation TPS5120-EP Datasheet
Part TPS5120-EP
Description Two-Phase Synchronous Buck DC/DC Controller
Feature TPS5120-EP; TPS5120ĆEP DUAL OUTPUT, TWOĆPHASE SYNCHRONOUS BUCK DC/DC CONTROLLER D Controlled Baseline − One Ass.
Manufacture etcTI
Datasheet
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Texas Instruments TPS5120-EP
TPS5120ĆEP
DUAL OUTPUT, TWOĆPHASE SYNCHRONOUS BUCK DC/DC CONTROLLER
D Controlled Baseline
− One Assembly/Test Site, One Fabrication
Site
D Extended Temperature Performance of
−55°C to 125°C
D Enhanced Diminishing Manufacturing
Sources (DMS) Support
D Enhanced Product-Change Notification
D Qualification Pedigree
D Independent Dual-Outputs Operate 180°
Out of Phase
D Wide Input Voltage Range: 4.5-V 28-V
D Adjustable Output Voltage Down to 0.9 V
D Pin-Selectable PWM/SKIP Mode for High
Efficiency Under Light Loads
D Synchronous Buck Operation Allows up to
95% Efficiency
D Separate Standby Control and Overcurrent
Protection for Each Channel
D Programmable Short-Circuit Protection
Component qualification in accordance with JEDEC and industry
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, Highly
Accelerated Stress Test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life. Such qualification
testing should not be viewed as justifying use of this component
beyond specified performance and environmental limits.
SGLS224A − JANUARY 2004 − REVISED APRIL 2006
D Low Supply (1 mA) and Shutdown (1 nA)
Current
D Power Good Output
D High-Speed Error Amplifiers
D Sequencing Easily Achieved by Selecting
Softstart Capacitor Values.
D 5-V Linear Regulator Power Internal IC
Circuitry
D 30-Pin TSSOP Packaging
DBT PACKAGE
(TOP VIEW)
INV1
1
FB1
2
SOFTSTART1
3
PWM/SKIP
4
CT
5
5V_STBY
6
GND
7
REF
8
STBY1
9
STBY2
10
FLT
11
POWERGOOD
12
SOFTSTART2
13
FB2
14
INV2
15
30
LH1
29
OUT1_u
28
LL1
27
OUT1_d
26
OUTGND1
25
TRIP1
24
VCC
23
TRIP2
22
VREF5
21
REG5V_IN
20
OUTGND2
19
OUT2_d
18
LL2
17
OUT2_u
16
LH2
description
The TPS5120 is a dual channel, high-efficiency synchronous buck controller where the outputs run 180 degrees
out of phase, which lowers the input current ripple, thereby reducing the input capacitance cost. The PWM/SKIP
pin allows the operating mode to switch from PWM mode to skip mode under light load conditions. The skip
mode enables a lower operating frequency and shortens the pulse width to the low-side MOSFET, increasing
the efficiency under light load conditions. These two modes, along with synchronous-rectifier drivers, dead time,
and very low quiescent current, allow power to be conserved and the battery life to be extended under all load
conditions. The 1.5 A (typical) high-side and low-side MOSFET drivers on-chip are designed to drive less
expensive N-channel MOSFETs. The resistorless current protection and fixed high-side driver voltage simplify
the power supply design and reduce the external parts count. Each channel is independent, offering a separate
controller, overcurrent protection, and standby control. Sequencing is flexible and can be tailored by choosing
different softstart capacitor values. Other features, such as undervoltage lockout, power good, overvoltage,
undervoltage, and programmable short-circuit protection promote system reliability.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 2006 Texas Instruments Incorporated
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Texas Instruments TPS5120-EP
TPS5120ĆEP
DUAL OUTPUT, TWOĆPHASE SYNCHRONOUS BUCK DC/DC CONTROLLER
SGLS224A − JANUARY 2004 − REVISED APRIL 2006
ORDERING INFORMATION
PACKAGE
TA
TSSOP
(DBT)
EVM
−40°C to 125°C TPS5120QDBTREP TPS5120EVM-151
−55°C to 125°C TPS5120MDBTREP TPS5120EVM-151
typical design
VI
C1
GND
R1
C4
C5
C6
C7
C8
R2
Q1
R3
U1
R7
TPS5120DBT
C3
1 INV1
30
LH1
D1
2 FB1
3 SOFTSTART1
29
OUT1_u
28
LL1
C11
Q2
4 PWM/SKIP
5
CT
6
5V_STBY
7 GND
8
REF
27
OUT1_d
OUTGND1 26
25
TRIP1
24
Vcc
23
TRIP2
C15
R8
R9
9
STBY1
10 STBY2
22
VREF5
21
REG5V_IN
C16
11 FLT
20
OUTGND2
12 POWERGOOD
OUT2_d 19
13 SOFTSTART2
14
FB2
15
R4
INV2
18
LL2
17 C12
OUT2_u
LH2 16
D2
Q3
R10
C10
C15
Q4
L1
C13
C14
L2
R5
R6
Figure 1. EVM Typical Design
VO1
VO2
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265



Texas Instruments TPS5120-EP
TPS5120ĆEP
DUAL OUTPUT, TWOĆPHASE SYNCHRONOUS BUCK DC/DC CONTROLLER
functional block diagram
SGLS224A − JANUARY 2004 − REVISED APRIL 2006
SOFTSTART1
FB1
INV1
CT
FLT
FB2
INV2
PWM/SKIP
SOFTSTART1
Skip Comp.
_
PWM Comp.
_
+
DLY
+
DLY
0.85 V
_
+
+ Err Amp.
_ OVP1
+
0.85 V+12%
_ OVP2
+
0.85 V+12%
+ UVP1
_
0.85 V −19.4%
+ UVP2
_
0.85 V −19.4%
OSC
UVLO
SIGNAL
STBY1
STBY2
Timer
Current
Protection
Trigger
Phase
Inverter
_ Err Amp.
+
+
_
+ Skip Comp.
PWM Comp.
_
+
_
+ LSD Trip
−(V CC − VTRIP1)
+
_
HSD Trip
Current Comp.
V CC − VTRIP1
V CC − VTRIP2
_
+
HSD Trip
_
+
LSD Trip
−(VCC − VTRIP2)
DLY
DLY
SOFTSTART2
0.85 V
SFT1
SFT2
SOFTSTART2
UVLO
SIGNAL
VCC
_
UVLO +
Comp.
STBY1
STBY2
REF
5V_STBY
0.85 V
GND
V ref
5 VREG
INV1
_
+
0.85 V−7%
PGcomp1
INV2
0.85 V +7%
+
INV1
_
PGcomp4
0.85 V +7%
+
_
INV2
PGcomp3
0.85 V −7%
_
+ PGcomp2
5.0 V
_
+
4.5 V
LH1
OUT1_u
LL1
OUT1_d
OUTGND1
TRIP1
V CC
TRIP2
OUTGND2
OUT2_d
LL2
OUT2_u
LH2
VREF5
REG5V_IN
POWERGOOD
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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