Step-Down Controller. TPS51124 Datasheet

TPS51124 Controller. Datasheet pdf. Equivalent

Part TPS51124
Description Dual Synchronous Step-Down Controller
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TPS51124
SLVS616C – NOVEMBER 2005 – REVISED DECEMBER 2014
TPS51124 Dual Synchronous Step-Down Controller for Low-Voltage Power Rails
1 Features
1 High Efficiency, Low-Power Consumption,
Shutdowns to <1 μA
• Fixed Frequency Emulated On-Time Control,
Frequency Selectable From Three Options
• D-CAP™ Mode Enables Fast Transient Response
• Auto-Skip Mode
• Less Than 1% Initial Reference Accuracy
• Low Output Ripple
• Wide Input Voltage Range: 3 V to 28 V
• Output Voltage Range: 0.76 V to 5.5 V
• Low-Side RDS(ON) Loss-less Current Sensing
• Adaptive Gate Drivers With Integrated Boost
Diode
• Internal 1.2-ms Voltage-Servo Soft-Start
• Powergood Signals for Each Channel With Delay
Timer
• Output Discharge During Disable, Fault
2 Applications
Notebook I/O and Low-Voltage System Bus
3 Description
The TPS51124 is a dual, adaptive on-time D-CAP™
mode synchronous buck controller. The part enables
system designers to cost effectively complete the
suite of notebook power bus regulators with the
absolute lowest external component count and lowest
standby consumption. The fixed frequency emulated
adaptive on-time control supports seamless operation
between PWM mode at heavy load condition and
reduced frequency operation at light load for high
efficiency down to milliampere range. The main
control loop for the TPS51124 uses the D-CAP mode
that optimized for low ESR output capacitors such as
POSCAP or SP-CAP promises fast transient
response with no external compensation. Simple and
separate power good signals for each channel allow
flexibility of power sequencing. The part provides a
convenient and efficient operation with supply input
voltages (V5IN, V5FILT) ranging from 4.5 V to 5.5 V,
conversion voltages (drain voltage for the
synchronous high-side MOSFET) from 3 V to 28 V
and output voltages from 0.76 V to 5.5 V.
The TPS51124 is available in 24-pin VQFN package
specified from –40°C to 85°C ambient temperature
range.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
TPS51124
VQFN (24)
4.00 mm × 4.00 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Input Voltage
3 V to 28 V
C9
22 µF
R5
R2
R4 75 kΩ
73.2 kΩ
SGND
75
kΩ
R1
28.7 kΩ
654321
VO2
1.5 V/10 A
SGND PGND
Power
Good2
C6
10 µF
Q3
IRF7821
L2
1 µH
EN2
C5
0.1 µF
7 PGOOD2
8 EN2
9 VBST2
10 DRVH2
TPS51124RGE
(QFN24)
PGOOD1 24
Power
Good1
EN1 23
EN1
VBST1 22
C2
0.1 µF
DRVH1 21
Q1
IRF7821
C4
2 x 330 µF
V5IN
4.5 V to 5.5 V
Q4
IRF8113
11 LL2
12 DRVL2
LL1 20
DRVL1 19
Q2
IRF8113
PGND
13 14 15 16 17 18
R6
6.8 kΩ
R7 R3
3.3Ω 6.8
kΩ
C7
4.7μF
C8
1μF
PGND
PGND
SGND
C3
L1 10 µF
1 µH
VO1
1.05 V/10 A
C1
2 x 330 µF
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.



TPS51124
TPS51124
SLVS616C – NOVEMBER 2005 – REVISED DECEMBER 2014
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings .................................... 4
6.2 Recommended Operating Conditions...................... 4
6.3 Thermal Information .................................................. 4
6.4 Electrical Characteristics.......................................... 5
6.5 Typical Characteristics .............................................. 7
7 Detailed Description ............................................ 10
7.1 Overview ................................................................. 10
7.2 Functional Block Diagram ....................................... 10
7.3 Feature Description................................................. 11
7.4 Device Functional Modes........................................ 13
8 Application and Implementation ........................ 14
8.1 Application Information............................................ 14
8.2 Typical Application .................................................. 14
9 Power Supply Recommendations...................... 18
10 Layout................................................................... 18
10.1 Layout Guidelines ................................................. 18
10.2 Layout Example .................................................... 19
11 Device and Documentation Support ................. 20
11.1 Third-Party Products Disclaimer ........................... 20
11.2 Trademarks ........................................................... 20
11.3 Electrostatic Discharge Caution ............................ 20
11.4 Glossary ................................................................ 20
12 Mechanical, Packaging, and Orderable
Information ........................................................... 20
4 Revision History
Changes from Revision B (September 2010) to Revision C
Page
• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1
Changes from Revision A (November 2005) to Revision B
Page
• Changed From: pin 48 = PGND1 To: pin 18 = PGND1 in the Pin Out illustration................................................................. 3
• Updated the Function Block Diagram................................................................................................................................... 10
Figure 19 - Removed the hysteretic symbol from the PWM component.............................................................................. 15
• Updated equation 9. Changed From: VOUT x 0.01 To: VOUT x 0.0132.................................................................................. 16
Changes from Original (November 2005) to Revision A
Page
• Updated the the circut illustration, Pin 21 changed From DRVL1 To: DRVH1 and Pin 19 changed From: DRVH1 to
DRVL1 .................................................................................................................................................................................... 1
• PG low hysteresis (PGOODx goes low) - deleted the Min -4% and Max -6% values ........................................................... 6
• PG high hysteresis (PGOODx goes low) - deleted the Min 4% and Max 6% values ............................................................ 6
• Hysteresis (recovery < 20 μs) - deleted the Min 8% and Max 12% values ........................................................................... 6
• Updated Figure 18, Pin 21 changed From DRVL1 To: DRVH1 and Pin 19 changed From: DRVH1 to DRVL1 ................. 14
2
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