2-Input Multiplexer. CD74HC257 Datasheet

CD74HC257 Multiplexer. Datasheet pdf. Equivalent

Part CD74HC257
Description Quad 2-Input Multiplexer
Feature Data sheet acquired from Harris Semiconductor SCHS171D November 1997 - Revised October 2003 CD54HC2.
Manufacture etcTI
Datasheet
Download CD74HC257 Datasheet



CD74HC257
Data sheet acquired from Harris Semiconductor
SCHS171D
November 1997 - Revised October 2003
CD54HC257, CD74HC257,
CD54HCT257, CD74HCT257
High-Speed CMOS Logic Quad 2-Input
Multiplexer with Three-State Non-Inverting Outputs
[ /Title
(CD74
HC257
,
CD74
HCT25
7)
/Sub-
ject
(High
Speed
CMOS
Logic
Quad
2-Input
Multi-
plexer
Features
• Buffered Inputs
• Typical Propagation Delay ( In to Output ) = 12ns at
VCC = 5V, CL = 15pF, TA = 25oC
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC
at VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il 1µA at VOL, VOH
Description
The ’HC257 and ’HCT257 are quad 2-input multiplexers
which select four bits of data from two sources under the
control of a common Select Input (S). The Output Enable
input (OE) is active LOW. When OE is HIGH, all of the out-
puts (1Y-4Y) are in the high impedance state regardless of
all other input conditions.
Moving data from two groups of registers to four common
output buses is a common use of the 257. The state of the
Select input determines the particular register from which
the data comes. It can also be used as a function generator.
Ordering Information
PART NUMBER
TEMP. RANGE
(oC)
PACKAGE
CD54HC257F3A
-55 to 125
16 Ld CERDIP
CD54HCT257F3A
-55 to 125
16 Ld CERDIP
CD74HC257E
-55 to 125
16 Ld PDIP
CD74HC257M
-55 to 125
16 Ld SOIC
CD74HC257MT
-55 to 125
16 Ld SOIC
CD74HC257M96
-55 to 125
16 Ld SOIC
CD74HCT257E
-55 to 125
16 Ld PDIP
CD74HCT257M
-55 to 125
16 Ld SOIC
CD74HCT257MT
-55 to 125
16 Ld SOIC
CD74HCT257M96
-55 to 125
16 Ld SOIC
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel. The suffix T denotes a small-quantity reel of
250.
Pinout
CD54HC257, CD54HCT257
(CERDIP)
CD74HC257, CD74HCT257
(PDIP, SOIC)
TOP VIEW
S1
1I0 2
1I1 3
1Y 4
2I0 5
2I1 6
2Y 7
GND 8
16 VCC
15 OE
14 4I0
13 4I1
12 4Y
11 3I0
10 3I1
9 3Y
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2003, Texas Instruments Incorporated
1



CD74HC257
CD54HC257, CD74HC257, CD54HCT257, CD74HCT257
Functional Diagram
15
OE
1
S
13
4I1
14
4I0
10
3I1
11
3I0
6
2I1
5
2I0
3
1I1
2
1I0
P
12
4Y
N
3 CIRCUITS IDENTICAL TO CIRCUIT
IN ABOVE DASHED ENCLOSURE
9
3Y
7
2Y
4
1Y
TRUTH TABLE
OUTPUT SELECT
ENABLE INPUT
DATA INPUTS
OE
S
I0
I1
H
X
X
X
L
L
L
X
L
L
H
X
L
H
X
L
L
H
X
H
H= High Voltage Level
L= Low Voltage Level
X= Don’t Care
Z= High Impedance, OFF State
OUTPUT
Y
Z
L
H
L
H
2





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