Dual 4-Input Multiplexer
Data sheet acquired from Harris Semiconductor SCHS170B
November 1997 - Revised October 2003
CD74HC253, CD74HCT253
High-...
Description
Data sheet acquired from Harris Semiconductor SCHS170B
November 1997 - Revised October 2003
CD74HC253, CD74HCT253
High-Speed CMOS Logic Dual 4-Input Multiplexer
[ /Title (CD74 HC253 , CD74 HCT25 3) /Subject (High Speed CMOS Logic Dual 4-Input Multiplexer)
Features
Description
Common Select Inputs
Separate Output-Enable Inputs
Three-State Outputs
Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
Wide Operating Temperature Range . . . -55oC to 125oC
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL Logic ICs
HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH
The CD74HC253 and CD74HCT253 are dual 4-to-1 line selector/multiplexers having three-state outputs. One of four sources for each section is selected by the common select inputs, S0 and S1. When the output enable (1OE, 2OE) is HIGH, the output is in the high-impedance state.
Ordering Information
PART NUMBER
TEMP. RANGE (oC) PACKAGE
CD74HC253E
-55 to 125
16 Ld PDIP
CD74HC253M
-55 to 125
16 Ld SOIC
CD74HC253MT
-55 to 125
16 Ld SOIC
CD74HC253M96
-55 to 125
16 Ld SOIC
CD74HCT253E
-55 to 125
16 Ld PDIP
CD74HCT253M
-55 to 125
16 Ld SOIC
CD74...
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