Gate Driver. UCC5304 Datasheet

UCC5304 Driver. Datasheet pdf. Equivalent

Part UCC5304
Description Sink Single-Channel Reinforced Isolation Gate Driver
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UCC5304
SLUSDV5B – OCTOBER 2019 – REVISED APRIL 2020
UCC5304 4-A Source, 6-A Sink Single-Channel Reinforced Isolation Gate Driver
With High Noise Immunity
1 Features
1 Reinforced isolation
• Single channel in DWV Package with 8.5-mm
creepage distance
• CMTI greater than 100-V/ns
• 4-A peak source, 6-A peak sink output
• Switching parameters:
– 40-ns maximum propagation delay
– 5-ns maximum delay matching
– 5.5-ns maximum pulse-width distortion
– 35-µs maximum VDD power-up delay
• Up to 18-V VDD output drive supply
– 5-V VDD UVLO
• Operating temp. range (TA) –40°C to 125°C
• Rejects input pulses shorter than 5-ns
• TTL and CMOS compatible inputs
2 Applications
• AC-DC and DC-DC converters
• Motor drives
• Industrial transportation and robotics
3 Description
The UCC5304 device is an isolated single-channel
gate driver with 4-A peak-source and 6-A peak-sink
current. It is designed to drive power MOSFETs and
GaNFETs in PFC, Isolated AC/DC, DC/DC, and
synchronous rectification applications, with fast
switching performance and robust ground bounce
protection through greater than 100-V/ns common-
mode transient immunity (CMTI).
The UCC5304 is available in a 8.5 mm SOIC-8
(DWV) package and can support isolation voltage up
to 5-kVRMS. Compared to an optocoupler, the
UCC5304 family has lower part-to-part skew, lower
propagation delay, higher operating temperature, and
higher CMTI.
Protection features include: IN pin rejects input
transient shorter than 5-ns; both input and output can
withstand –2-V spikes for 200-ns, both supplies have
undervoltage lockout (UVLO), and active pull down
protection clamps the output below 2.1-V when
unpowered or floated.
With these features, this device enables high
efficiency, high power density, and robustness in a
wide variety of power applications.
Device Information(1)
PART NUMBER
PACKAGE
UCC5304
DWV-8 (SOIC)
UVLO
5-V
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application
VCCI
VDD
VCC2
UVLO,
IN
UVLO
and
Level
Shift
Input
texatnd
Logic
Control
Logic
OUT
Rest of
Circuit
GND
VSS
Copyright © 2019, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.



UCC5304
UCC5304
SLUSDV5B – OCTOBER 2019 – REVISED APRIL 2020
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information ................................................. 5
6.5 Power Ratings........................................................... 5
6.6 Insulation Specifications............................................ 6
6.7 Safety-Related Certifications..................................... 7
6.8 Safety-Limiting Values .............................................. 7
6.9 Electrical Characteristics........................................... 8
6.10 Switching Characteristics ........................................ 9
6.11 Typical Characteristics .......................................... 10
7 Parameter Measurement Information ................ 13
7.1 Rising and Falling Time ......................................... 13
7.2 Power-up UVLO Delay to OUTPUT........................ 13
8 Detailed Description ............................................ 14
8.1 Overview ................................................................. 14
8.2 Functional Block Diagram ....................................... 14
8.3 Feature Description................................................. 15
8.4 Device Functional Modes........................................ 18
9 Application and Implementation ........................ 19
9.1 Application Information............................................ 19
9.2 Typical Application .................................................. 19
10 Power Supply Recommendations ..................... 22
11 Layout................................................................... 23
11.1 Layout Guidelines ................................................. 23
11.2 Layout Example .................................................... 24
12 Mechanical, Packaging, and Orderable
Information ........................................................... 24
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (February 2020) to Revision B
Page
• Changed marketing status from Advance Information to initial release. ............................................................................... 1
2
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