VOLTAGE REGULATOR. HMC1060LP3E Datasheet

HMC1060LP3E REGULATOR. Datasheet pdf. Equivalent

Part HMC1060LP3E
Description QUAD LOW NOISE HIGH PSRR LINEAR VOLTAGE REGULATOR
Feature HMC1060LP3E v00.1211 QUAD LOW NOISE HIGH PSRR LINEAR VOLTAGE REGULATOR Power Conditioning - SMT .
Manufacture Analog Devices
Datasheet
Download HMC1060LP3E Datasheet



HMC1060LP3E
HMC1060LP3E
v00.1211
QUAD LOW NOISE HIGH PSRR
LINEAR VOLTAGE REGULATOR
Typical Applications
The HMC1060LP3E is ideal for applications requiring
superb power supply isolation and ultra low noise
performance:
• Ultra Low Noise Frequency Generation (PLLs, VCOs,
PLLs with Integrated VCOs)
• RF & Mixed-Signal Supply
Functional Diagram
Features
Ultra Low Noise:
3 nV/√Hz at 10 kHz, 7 nV/√Hz at 1 kHz
High Power Supply Rejection Ratio (PSRR)
80 dB at 1 kHz, 60 dB at 1 MHz
Four Adjustable Voltage Outputs:
VR1: 100 mA at 1.8 V to 5.2 V
VR2 & VR3: 50 mA at 1.8 V to 5.2 V
VR4: 300 mA at 1.8 V to 5.2 V
Optional Proportional To Temperature (PTAT) Output
Voltages: 7 % / 125 °C
Thermal Protection
Low Power-Down Current: <1 µA
16 Lead 3x3 mm SMT Package: 9 mm²
General Description
The HMC1060LP3E is a BiCMOS ultra low noise
quad-output linear voltage regulator targeted at high
performance applications requiring superb power
supply isolation.
Maximum 500 mA of current, distributed between four
independent outputs, enable the HMC1060LP3E to
supply all of the power needs of Hittite’s Wideband
PLL with Integrated VCO products, such as the
HMC830LP6GE.
Although targeted at Hittite’s Wideband PLLs with
Integrated VCO products, the HMC1060LP3E makes
an excellent general purpose regulator that supports
adjustable output voltages ranging anywhere from
1.8 V to 5.2 V.
An Integrated PTAT (Proportional To Absolute
Temperature) feature enabled via an external pin,
allows the HMC1060LP3E to scale the supply voltage
with temperature in order to maximize phase noise
and output power performance of Hittite’s Wideband
with Integrated VCO products, as well as other devices
powered by the HMC1060LP3E.
Integrated thermal protection disables the outputs of
the HMC1060LP3E at extreme temperatures, until
the device cools down, making the HMC1060LP3E
a robust device capable of dealing with temporary
and unforeseen scenarios including momentary short
circuits and extreme temperatures.
External Enable input provides a convenient way
to power on or off all of the devices supplied by the
HMC1060LP3E.
The HMC1060LP3E is housed in a 3x3 mm QFN SMT
package.
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POhrodnee:r7O81n-3-l2i9n-e47a0t0wwOrwde.hr oitntliitnee.catowmww.analog.com
Trademarks and registered trademarks arAe tphepplriocpearttyioofntheSir urepsppecotivret:owPnehrso. ne: 978-250-3A3p4p3licaotrionaSpuppsp@orht:iPtthitoen.ec: o1-m800-ANALOG-D



HMC1060LP3E
v00.1211
HMC1060LP3E
QUAD LOW NOISE HIGH PSRR
LINEAR VOLTAGE REGULATOR
Electrical Specifications
TA = +25 °C, VDD = 5.6 V, Unless Otherwise Specified, PTAT Mode is disabled, measured at maximum load conditions
in default configuration as shown in Application Schematic.
Parameter
Conditions
Min
Typ
Max
Units
Output Voltage on All Outputs
1.8
5.2
V
Default Output Voltage VR1, VR2, VR3
Default Configuration shown in Application
3.24
3.3
3.36
V
Default Output Voltage VR4
Schematic
4.9
5.0
5.1
V
Output Voltage Tolerance [1]
PTAT Mode Disabled
PTAT Mode Enabled
2
%
3
%
Input Voltage Range (Default)
5.3
5.6
V
Input Voltage Range [2]
3.35
Max (VRx) +
0.3 V
5.6
V
Output Current VR1 [3]
Output Current VR2, VR3 [3]
Output Current VR4 [3]
Total Output Current
Output Noise Voltage Density
10 Hz
100 Hz
1 kHz
10 kHz
100 kHz
TA = -40 °C to +85 °C
TA = -40 °C to +85 °C
TA = -40 °C to +85 °C
TA = -40 °C to +85 °C
2200
120
7
3
3
100
mA
50
mA
300
mA
500
mA
nV/√Hz
Integrated Output Noise 100 Hz to 100 kHz
1.5
µVrms
Load Regulation, VR4
0 to 300 mA
0.007
% / mA
VR1 PSRR
1 kHz
10 kHz
100 KHz
1 MHz
10 MHz
80
80
72
dB
60
52
Current Consumption (IGND)
VEN = VDD = 5.6 V;
Maximum Load Current
2.1
mA
Power Down Current
VEN = Low; VRx outputs are floating (high
- impedance) in Power-Down Mode
1
2
µA
Start-Up Transient Time
0 to 90% of final voltage;
EN connected to VDD
50
ms
EN Turn-On Delay
0 to 90% of final output voltage
Cref = 4.7 µF; Cload = 10 µF; VDD = 5.6
30
ms
VEN transition from 0 to VDD
Enable Input EN High Level
2
VDD + 0.3
V
Enable Input EN Low Level
0
0.8
V
Thermal Protection Threshold Junction
Temperature
No loads
150
°C
Maximum Dissipated Power
All Outputs Loaded
1.6
W
[1] When using external resistors to configure the HMC1060LP3E outputs to non-default levels, the temperature coefficient of external resistors
may increase the output voltage tolerance. Note that internal resistors have a temperature coefficient of +270 ppm/°C.
[2] Minimum input voltage (VDD) is defined by maximum desired output voltage. As an example minimum input voltage (VDD) of 4.3 V is required
to set the HMC1060LP3E outputs as follows VR1 = VR2 = VR3 = 3.3 V, VR4 = 4 V.
[3] The outputs will withstand short-circuit conditions for a duration of less than 10 seconds.
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oFOornaretpTioreicnceh,,n2odleEolgilviyezrWayb,ayae,ntPdh.OtDo. rBpivolaxec9,e1C0oh6rd,eeNlrmos:rswAfoonoarddlo,,gMMADAe0v2i0c0e16s28,-29In410c.6,
POhrodnee:r7O81n-3-l2i9n-e47a0t0wwOrwde.hr oitntliitnee.catowmww.analog.com
2
Trademarks and registered trademarks arAe tphepplriocpearttyioofntheSir urepsppecotivret:owPnehrso. ne: 978-250-3A3p4p3licaotrionaSpuppsp@orht:iPtthitoen.ec: o1-m800-ANALOG-D





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