N SYNTHESIZER. HMC698LP5 Datasheet

HMC698LP5 SYNTHESIZER. Datasheet pdf. Equivalent

Part HMC698LP5
Description INTEGER N SYNTHESIZER
Feature v03.0709 Typical Applications The HMC698LP5(E) is ideal for: • Satellite Communication Systems • Poi.
Manufacture Analog Devices
Datasheet
Download HMC698LP5 Datasheet



HMC698LP5
v03.0709
Typical Applications
The HMC698LP5(E) is ideal for:
• Satellite Communication Systems
• Point-to-Point Radios
• Military Applications
• Sonet Clock Generation
6
Functional Diagram
HMC698LP5 / 698LP5E
7 GHz INTEGER N SYNTHESIZER
(N = 12 - 259)
Features
Ultra Low SSB Phase Noise Floor:
-153 dBc/Hz @ 10 kHz offset @ 100 MHz
Reference Frequency.
Programmable Divider (N= 12 - 259) Operating
up to 7 GHz
Open Collector Output Buffer Amplifiers for
Interfacing w/ Op-Amp Based Loop Filter
Reversible Polarity PFD w/ Lock Detect Output
32 Lead 5x5mm SMT Package: 25mm2
General Description
The HMC698LP5(E) is a frequency synthesizer with
a wideband reversible polarity digital PFD and lock
detect output. The divider operates unconditionally
from 80 - 7000 MHz with a continuous integer
division ratio of 12 to 259. The HMC698LP5(E) high
frequency operation along with ultra low phase noise
floor make possible synthesizers with wide loop
bandwidth and low N resulting in fast settling and
very low phase noise. When used in conjunction with
a differential loop filter, the HMC698LP5(E) can be
used to phase lock a VCO to a reference oscillator.
6-1
Electrical Specifications, TA = +25° C, Vcc = Vcc1 = Vcc2 = Vcc3 = Vcc_pd = 5V
Parameter
Maximum Ref. Input Frequency
Minimum Ref. Input Frequency
Reference Input Power Range
Maximum VCO Input Frequency
Minimum VCO Input Frequency
VCO Input Power Range
Conditions
Sine or Square Wave Input [1]
Square Wave Input [2]
100 MHz Frequency
100 MHz Input Frequency
Min.
Typ.
Max.
1300
10
-5
+5
7000
80
-10
+5
PFD Output Voltage
2000
PFD Gain
Gain = Vpp / 2π Rad.
0.32
SSB Phase Noise
@ 10 kHz Offset @ 100 MHz Square Wave Ref. Input
Pin= 0 dBm
-153
Total Supply Current
310
[1] Maximum frequencies may be limited by available counter division ratio.
[2] Square wave input achieves best phase noise at lower ref. frequency (see sine & square wave comparison plots)
Units
MHz
MHz
dBm
MHz
MHz
dBm
mV, Pk - Pk
V/Rad.
dBc/Hz
mA
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Trademarks and registered trademarks aArepthpelpircopaetrityoonf thSeiur rpesppeoctrivte: oPwhneorsn. e: 978-250-33A4p3plicoartioanpSpusp@pohrti:tPtihteo.nceo: 1m-800-ANALOG-D



HMC698LP5
v03.0709
Phase Noise Floor [1][2][3]
Ref = Sine Wave, Vcc = 4.75V
-100
-110
-120
-130
-10 dBm
-5 dBm
0 dBm
+5 dBm
-140
-150
-160
-170
-180
102
103
104
105
OFFSET FREQUENCY (Hz)
HMC698LP5 / 698LP5E
7 GHz INTEGER N SYNTHESIZER
(N = 12 - 259)
Phase Noise Floor [1][2][3]
Ref = Square Wave, Vcc = 4.75V
-100
-110
-120
-130
-10 dBm
-5 dBm
0 dBm
+5 dBm
-140
-150
-160
-170
-180
102
103
104
105
OFFSET FREQUENCY (Hz)
Phase Noise Floor [1][2][3]
Ref = Sine Wave, Vcc = 5V
-100
-110
-120
-130
-10 dBm
-5 dBm
0 dBm
+5 dBm
-140
-150
-160
-170
-180
102
103
104
105
OFFSET FREQUENCY (Hz)
Phase Noise Floor [1][2][3]
Ref = Square Wave, Vcc = 5V
-100
-110
-120
-130
-10 dBm
-5 dBm
0 dBm
+5 dBm
-140
-150
-160
-170
-180
102
103
104
105
OFFSET FREQUENCY (Hz)
Phase Noise Floor [1][2][3]
Ref = Sine Wave, Vcc = 5.25V
Phase Noise Floor [1][2][3]
Ref = Square Wave, Vcc = 5.25V
-100
-100
-110
-120
-130
-140
-10 dBm
-5 dBm
0 dBm
+5 dBm
-110
-120
-130
-140
-10 dBm
-5 dBm
0 dBm
+5 dBm
-150
-150
-160
-160
-170
-170
-180
102
103
104
105
OFFSET FREQUENCY (Hz)
-180
102
103
104
105
OFFSET FREQUENCY (Hz)
[1] Phase Noise Floor vs Offset Frequency with varying Ref Power Level
[2] Fin= 7000 MHz @ 0 dBm, Ref Frequency = 100 MHz, N = 70
[3] Phase Noise Floor remains constant beyond 100 kHz offset frequency
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Trademarks and registered trademarks aArepthpelpircopaetrityoonf thSeiur rpesppeoctrivte: oPwhneorsn. e: 978-250-33A4p3plicoartioanpSpusp@pohrti:tPtihteo.nceo: 1m-800-ANALOG-D
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